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USB-BlasterII mounts as "USB-Blaster variant"
Hello! My company uses the USB-BlasterII pods with Quartus. Many times, when the Blaster is plugged in, it is detected by Quartus as "USB-Blaster variant" instead of "USB-BlasterII". When this happens, the JTAG clock frequency is not settable, and the pod will not operate correctly. The problem occurs equally with Quartus Prime 16.1 and Quartus Standard 24.1. I have not tried other versions of Quartus. This appears to be the same root issue that AdamLevine experienced in a previous Altera forum post: USB Blaster II | Altera Community. To answer the questions he was asked, Yes, we experience this issue on all the PCs we have tried the USB-BlasterII on. My company is running Windows 11. We tried numerous boards, but similar to Adam, the problem occurs whether a board is connected to the Blaster or not. The issue appears to be with the driver for the Blaster and how it is detected when it is connected to the PC. This problem has been occurring more lately than it used to, but we have had significant failure rates with this for the past two years almost. I know our JTAG pin connections are correct because the USB-BlasterII works perfectly IF AND ONLY IF it is detected with the correct device name but cannot work at all if it shows up with the wrong name in Quartus. Our conclusion is that the drivers for the USB-BlasterII have a problem. I suspect that the driver caches the Blaster devices that have been connected and encounters an error if the cache is not cleared by ejecting all the Blaster devices. Just a guess. Has anyone found the issues with the drivers? Is anyone from Intel available to look into this behavior? If not, would Intel supply my corporation with the driver source code so our engineers can fix it? Thanks!139Views1like4CommentsQuartus lite 25.1 Altpll issues
Using Quartus Lite 25.1 and trying to add ALTPLL IP, but still seems to be an issue ? The megawizard window seems to appear for a while and them disappears again. Generation seems to be incomplete since the file .qip file appears empty. I've seem this as an issue earlier, but post was 2 years old so thought I would check again if this is still an issue and if there are some workarounds.1View0likes0CommentsBidirectional pin USB_RX with a pseudo-differential I/O standard must use the OEIN port of the node
I am trying to make a bidirectional differential line using Cyclone V. In VHDL, I set USB_RX, USB_RXn as INOUT on the top level (they are assigned to a Differential SSTL-II 2.5 pair). I used the ALTIOBUF in differential mode and crated this block: COMPONENT DIFF_IO_BUF PORT ( DATAIN : IN STD_LOGIC; OE : IN STD_LOGIC; OE_B : IN STD_LOGIC; DATAIO : INOUT STD_LOGIC; DATAIO_B : INOUT STD_LOGIC; DATAOUT : OUT STD_LOGIC ); END COMPONENT; It's connected as following: DIFF_RX : DIFF_IO_BUF PORT MAP ( DATAIN => 'Z', OE => '0', OE_B => '1', DATAIO => USB_RX, DATAIO_B => USB_RXn, DATAOUT => iUSB_RX_I ); iUSB_RX_I goes to internal logic. Why am I getting this error? I don't see any OEIN port. I assume it means the OE and OE_B ports, but they are already connected. How can I fix this error? The whole error msg: Error (21168): Bidirectional pin USB_RX with a pseudo-differential I/O standard must use the OEIN port of the node DIFF_IO_BUF:DIFF_RX|DIFF_IO_BUF_iobuf_bidir_iup:DIFF_IO_BUF_iobuf_bidir_iup_component|wire_pseudo_diffa_o Thank you!25Views0likes6CommentsQuartus Dark Theme on Linux - Solution
I have a solution for setting up a dark theme for Quartus Prime 25 on Linux (Mint) and setup a Github repo. The program modifies the stylesheet using a Rust program. https://github.com/saturn77/quartus-dark-linux This repo allows running Altera Quartus on Linux with a dark theme, providing a modern look while being easy on the eyes for Linux users. There are some dark stylesheets for Windows, but those simply will not work on Linux. Quartus's argument parser intercepts -stylesheet before Qt can process it on Linux. This project uses a small Rust LD_PRELOAD library to hook QApplication::exec() and inject the stylesheet directly via Qt's setStyleSheet() API. Tested with Quartus Prime Pro 25.3.1 (Qt 6.5.7) on Linux Mint 22.3 Cinnamon.Nios-V on Cyclone IV
Hi all Trying to get a NÌOS-V running on Cyclone IV using, just the basics. Using Quartus 25.1. Just as a test I added just the neccessary components and the sysid as shows in the picture below. Quartus project was compiled without any errors. Moving on to the application, created a bsp with the sopcinfo file created by Quartus using the command : niosv-bsp --create --sopcinfo=iwis_top.sopcinfo --type=hal software/bsp/settings.bsp Then created the application using the command : niosv-app --bsp-dir=software/bsp --app-dir=software/app --srcs=software/app The application compiles with "empty" main file, but if I try to add system.h and altera_avalon_sysid_qsys to use alt_avalon_sysid_qsys_test() it failes with error "Unknown reference to alt_avalon_sysid_qsys_test". Should not this work right right out of the box ?Solved65Views0likes7CommentsQuartus Prime Pro 25.1 fatal error during fitter: Windows "Efficiency mode" required
Quartus 25.1 usually crashes during fitter, with a number of different crash reports. Here below are two examples: Problem Details Error: *** Fatal Error: Access Violation at 000000BC2DC1E830 Module: quartus_fit.exe Stack Trace: Other 0xbc2dc1e82f: Other 0xbc2dc1e6af: Other 0x1bf404d29ff: End-trace Executable: quartus Comment: None System Information Platform: windows64 OS name: Windows 11 OS version: 10.0.22631 Quartus Prime Information Address bits: 64 Version: 25.1.0 Build: 129 Edition: Pro Edition ------------------------------- Problem Details Error: *** Fatal Error: Module: quartus_fit.exe Stack Trace: Quartus 0x5fb4b: RaiseException + 0x6b (KERNELBASE) Quartus 0x26ad: __ExceptionPtrRethrow + 0x15d (MSVCP140) Quartus 0x19cfe: tbb::detail::r1::current_context + 0x277e (tbb12) Quartus 0x19d78: tbb::detail::r1::current_context + 0x27f8 (tbb12) Quartus 0x17695: tbb::detail::r1::current_context + 0x115 (tbb12) Quartus 0xa2567: FDRGN_EXPERT::run_place_flow + 0xd17 (fitter_fdrgn) Quartus 0xa0018: FDRGN_EXPERT::run_place + 0x188 (fitter_fdrgn) Quartus 0x95135: FDRGN_EXPERT::place + 0x195 (fitter_fdrgn) Quartus 0x2c120: fit2_fit_place_auto + 0xc0 (comp_fit2) Quartus 0x16442: TclNRRunCallbacks + 0x62 (tcl86) Quartus 0x4e6b: fit2_fit_place + 0x33b (comp_fit2) Quartus 0x16442: TclNRRunCallbacks + 0x62 (tcl86) Quartus 0x17c4d: TclEvalEx + 0x9ed (tcl86) Quartus 0xa6a8b: Tcl_FSEvalFileEx + 0x22b (tcl86) Quartus 0xa5136: Tcl_EvalFile + 0x36 (tcl86) Quartus 0x230ac: qexe_evaluate_tcl_script + 0x66c (comp_qexe) Quartus 0x21be9: qexe_do_tcl + 0x8f9 (comp_qexe) Quartus 0x2a1ad: qexe_run_tcl_option + 0x6cd (comp_qexe) Quartus 0x4119f: qcu_run_tcl_option + 0x6ef (comp_qcu) Quartus 0x29969: qexe_run + 0x629 (comp_qexe) Quartus 0x2abd6: qexe_standard_main + 0x266 (comp_qexe) Quartus 0xbd32: qfit2_main + 0x82 (quartus_fit) Quartus 0x28708: msg_main_thread + 0x18 (ccl_msg) Quartus 0x29912: msg_thread_wrapper + 0x82 (ccl_msg) Quartus 0x2b063: mem_thread_wrapper + 0x73 (ccl_mem) Quartus 0x265df: msg_exe_main + 0x17f (ccl_msg) Quartus 0xcfab: __scrt_common_main_seh + 0x10b (quartus_fit) Quartus 0x1259c: BaseThreadInitThunk + 0x1c (KERNEL32) Quartus 0x5af37: RtlUserThreadStart + 0x27 (ntdll) End-trace Executable: quartus Comment: None System Information Platform: windows64 OS name: Windows 11 OS version: 10.0.22631 Quartus Prime Information Address bits: 64 Version: 25.1.0 Build: 129 Edition: Pro Edition ----------------------------- this happens with every design and with Arria10, Stratix 10 and also Agilex 7. The only way to avoid these Quartus crashes is to run the fitter in Windows "Efficiency Mode", but that makes fitting time more or less double. Any hints?1.7KViews0likes15CommentsReading S25FL256S OTP region via QSPI Indirect Transfer on Cyclone V HPS — data comes back incorrect
What I'm trying to do I need to read OTP memory region of the S25FL256S flash using command 0x4B. The system normally runs in quad-SPI mode (0xEC, 4-byte address). Since the data I need is more than 8 bytes (STIG limit), I'm trying to use the indirect transfer path. The 0x4B command requires: Single-SPI (1-wire address and data) 3-byte address 1 fixed dummy byte (8 clocks) after address Setup The QSPI controller is initialized at startup using the standard Altera HAL: alt_qspi_init(); // detects flash JEDEC ID, configures timing, sets up qspi_config struct alt_qspi_enable(); // enables controller, sets quad mode (0xEC, 4-byte addr, LC=10b) After this, normal quad-SPI reads via alt_qspi_read() works correctly. What I'm doing Reconfigure controller for 0x4B (OTP Read) ALT_QSPI_DEV_INST_CONFIG_t read_cfg = { .op_code = 0x4B, .inst_type = ALT_QSPI_MODE_SINGLE, .addr_xfer_type = ALT_QSPI_MODE_SINGLE, .data_xfer_type = ALT_QSPI_MODE_SINGLE, .dummy_cycles = 8 }; alt_qspi_device_read_config_set(&read_cfg); ALT_QSPI_DEV_SIZE_CONFIG_t size_cfg = { ... .addr_size = 2, // N+1 encoding → 3 bytes on wire .page_size = 256, ... }; alt_qspi_device_size_config_set(&size_cfg); Disable QUAD on the flash device itself via STIG alt_qspi_read_register(0x35, ®s[1]); // read CR1 alt_qspi_read_register(0x05, ®s[0]); // read SR1 alt_qspi_device_wren(); regs[1] = (regs[1] & 0x3D) | 0x00 | 0x80; // QUAD=0, LC=10b alt_qspi_stig_wr_cmd(0x01, 0, 2, (uint32_t*)regs, timeout); alt_qspi_sr_wait_write(timeout); Execute indirect read // Internally: sets INDRDSTADDR, INDRDCNT, starts transfer, // then CPU drains SRAM FIFO via ALT_QSPIDATA_ADDR alt_qspi_read(dst, src, size); Problem The data returned by the indirect read is incorrect. A STIG-based read of the same region (using the same 0x4B command, 8 bytes at a time) returns the correct data. The indirect read returns wrong/shifted bytes. Hence do I need to configure anything else? Result correct value : 97C5995C5C1E9D5D7A00D4E6BD4ED53E read value : FF97C5995C5C1E9D5D7A00D4E6BD4ED5Inquiry regarding purchasing FPGA licenses
We are looking to purchase Intel FPGA software licenses for our company, specifically: * Intel NCO MegaCore IP license * Intel Quartus Prime Standard Edition license Can someone please help with the supplier on where we can do this transaction ? Thank you so much!Cyclone 10 LP's Extended Industrial parts
[Question] Customer have questions about Cyclone 10 LP's Extended Industrial (Tj = -40degC to 125degC) in the Product Catalog at the following URL. https://www.intel.com/content/www/us/en/content-details/730595/altera-product-catalog.html What is part number of Extended Industrial of "10 CL010YM164I7 G" as part number of Normal Industrial? What should the customer do if they want to check the power consumption by EPE(Early Power Estimator)? How can the customer design with Extended Industrial part if they want to compile with Quartus? Best Regards72Views0likes6Comments
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