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Arun_Prabakatr's avatar
Arun_Prabakatr
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2 months ago

Operating system kernel-level FPGA bridge communication

We are using a custom (Agilex 5) platform and need to access the FPGA bridges from the Linux kernel. We are unable to locate the corresponding device tree nodes or modifications required to access these memory-mapped regions. We're aware of the devmem2 package, but we want to access the FPGA from the kernel side without relying on it. Please guide us on how to configure the device tree and use kernel-level commands or interfaces to access the HPS-to-FPGA and Lightweight HPS-to-FPGA bridges.
configuration from Linux. 
CONFIG_OF_RESOLVE y 
CONFIG_OF_OVERLAY y 
CONFIG_OF_CONFIGFS y 
CONFIG_FPGA_MGR_STRATIX10_SOC y 
CONFIG_FPGA_BRIDGE y 
CONFIG_FPGA_REGION y 
CONFIG_OF_FPGA_REGION y 
CONFIG_OVERLAY_FS y

embedded peripheral
operating system

11 Replies

    • Arun_Prabakatr's avatar
      Arun_Prabakatr
      Icon for New Contributor rankNew Contributor
      2 months ago

      Hi AlanCLTan,

      We are aware that we can access the bridges using U-Boot as well as the devmem2 tool in Linux. However, similar to what was done for Arria 10 and Stratix devices (as shown below), we need to validate this functionality on Agilex 5. If you have any ideas or guidance on this, please let us know.

      Arria 10 Ref :
      From source DOC:
      -----------------
      https://www.kernel.org/doc/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt

      How to configure FPGA from Linux
      --------------------------------
      https://malt.zendesk.com/hc/en-us/articles/900006256923-How-to-configure-FPGA-from-Linux

      Checking bridge and  enable :
      ------------------------------
      https://malt.zendesk.com/hc/en-us/articles/900005300186-U-Boot-HPS-FPGA-Bridge-Open-Command-for-SoC-FPGAs


      We are indeed looking to validate the above on the QPDS25.1 Linux version 6.12.11.incase if you any other method from linux OS please let us know 

  • AlanCLTan's avatar
    AlanCLTan
    Icon for Occasional Contributor rankOccasional Contributor
    2 months ago

    Hi Arun,

    devmem2 is the most common and easiest way to access a FPGA bridge from Linux kernel, to do it another way, you could try adding a node similar to https://www.kernel.org/doc/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt into https://github.com/altera-fpga/linux-socfpga/blob/QPDS25.1_REL_GSRD_PR/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts, but with another values for register range, reset, and clock. You will also need a custom driver to access the node you created.

  • TiensungA_Altera's avatar
    TiensungA_Altera
    Icon for Occasional Contributor rankOccasional Contributor
    1 month ago

    hi,

    By right, the devmem2 must be used to read/write to the HPS2FPGA bridge using the mapping below for Agilex5. I can see that your mapping is incorrect.  If you are using the LW HPS2FPGa, it starts at 0x1FC0_0000.

    You do not need to create any nodes in the device tree. The nodes in the device tree are only required if you are writing/using SOFT IP Device drivers in Linux kernel to access the bridge. Without drivers and with user-space interface, you should be able to use devmem2.

    The bridges will be enabled by default if you do a FPGA configuration in Linux. If you perform this in U-boot, you will have to do a bridge enable in uboot before booting the Linux.  The configs that you use above example, CONFIG_FPGA_BRIDGE and _REGION are only required if you are doing FPGA configuration in Linux as they are required by the FPGA manager device driver "stratix10_soc.ko" driver to configure the 2nd stage FPGA core.rbf. In short, the bridges should be enabled if you have configured the FPGA in UBOOT prior to loading Linux.