New Contributor
Occasional ContributorCan you try running "bridge enable" in the U-boot Shell?
You may refer to https://altera-fpga.github.io/rel-25.3/embedded-designs/agilex-7/f-series/soc/boot-examples/ug-linux-boot-agx7-soc/#enabling-bridges-from-u-boot (the same method works for Agilex5)
New ContributorHi AlanCLTan,
We are aware that we can access the bridges using U-Boot as well as the devmem2 tool in Linux. However, similar to what was done for Arria 10 and Stratix devices (as shown below), we need to validate this functionality on Agilex 5. If you have any ideas or guidance on this, please let us know.
Arria 10 Ref :
From source DOC:
-----------------
https://www.kernel.org/doc/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
How to configure FPGA from Linux
--------------------------------
https://malt.zendesk.com/hc/en-us/articles/900006256923-How-to-configure-FPGA-from-Linux
Checking bridge and enable :
------------------------------
https://malt.zendesk.com/hc/en-us/articles/900005300186-U-Boot-HPS-FPGA-Bridge-Open-Command-for-SoC-FPGAs
We are indeed looking to validate the above on the QPDS25.1 Linux version 6.12.11.incase if you any other method from linux OS please let us know
