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Altera_Forum's avatar
Altera_Forum
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15 years ago

NIOS II won't run from power-on

I can't quite get NIOSII to run when power is applied.

The Flash Programmer seems to work and it will start after flashing if 'run from reset' is selected.

Resetting the CycloneIII hardware restarts NIOS properly.

I've used the Command Line to reset NIOS and it works. I've verified the code before and after power is removed and the code seems to be fine in the EPCS flash. Resetting the CycloneIII hardware works correctly after power is reapplied but NIOS won't start either with a hardware reset or using the --go command.

The only way of restarting NIOS is to download code using RUN from the Eclipse GUI! (This fails to complete properly but kicks NIOS into life. Using the 'nios2-download -g xxx.elf' and 'nios2-flash-programmer --epcs --go..' commands do not have the desired effect although there is no error)

Now resetting either hardware of from Command Line works again.

There is obvioulsy something vital missing - has anyone got to a similar situation and worked out how to fix this permanently!

Thank you

14 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    So I assume you're setup to boot your NIOS from the EPCS flash? Are you certain that the EPCS bootloader was compiled into your FPGA image?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    There is an epcs flash controller compiled into the hardware and the reset is directed to its base address; I've assumed that is enough to make the bootloader function. Is there anything else that needs to be done?

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Try to disable Settings/Advanced/hal/log_port in bsp editor. Without disabling Nios II seems to wait for a jtag connection. Works fine for me.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thank you for the suggestion but the 'log_port' is already set to 'none' so I don't think it can be the same problem.

    It is possible the boot-loader is missing - once the code is in RAM everything is fine after any form of reset - but how do I tell and how do I ensure there is one present?
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    The bootloader is part of the epcs_controller component (in onchip memory).

    Are you sure you're programming your flash properly? What exactly are you doing to program flash?
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I'm using the Flash Programmer utility from the NIOS Eclipse GUI. This runs through without any complaints and the processor will start BUT not after power has been cycled off and on. In that case it is necessary to first RUN from Eclipse GUI, then the Flash Programmer will work, writing code and starting the processor again until power is cycled.

    One odd observation - although issuing the RUN from the GUI works fine, issuing the same command (apparently) from the command line does not restart the processor. Again once the GUI RUN has been issued, the processor can be restarted from the command line or even hardware reset without any trouble.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Is there an LED on the FPGA config done line? Is there a way for you to confirm that the FPGA is getting loaded on power-up independent of software?

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Yes, the device is configured properly; Config Done goes high after power is applied and before any downloading.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    If you have a scope available, using FPGA config done as a trigger and look at the data output of the Flash. The EPCS controller should be loading the data from the flash and there should be a long string of ones and zeros ( your elf code ). I've never had this issue, so I haven't looked at how the elf is loaded, but it will most likely be in small bursts because the CPU is executing code at this point.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Yes, I have looked at the data transfer from the EPCS and it is as expected - the first transfer is all from the EPCS chip, then Config Done goes true and another 15ms period of activity follows including both data to and from the EPCS chip.