Find where false_path was set.

Run "Report SDC" from the Timing Analyzer or run the timing exceptions report.

report_sdc expands wildcards to list every path in the design and then references the .sdc file and line number where the constraint came from. So you can generate the report and search in the report for the path in question. Then the report will point you to the applied constraint(s).

If you're still not finding the path, then something else is going on.

Hi

can you point me to the report that expand the wildcard.

since I used the next command (gui or to file)

>report_sdc -file report_sdc.txt

and I still see the wild cards

+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Set False Path ;
+----------------+-------+------------+------------------------+---------+----------+-------------------------------------------------------+----------------------------+----------+
; SDC Command ; Flags ; From Flags ; From ; Through ; To Flags ; To ; Location ; Comments ;
+----------------+-------+------------+------------------------+---------+----------+-------------------------------------------------------+----------------------------+----------+
; set_false_path ; ; -from ; [get_clocks {rx_*}] ; ; -to ; [get_clocks {pll_*}] ; scf_manual_addition.scf:65 ; ;
+----------------+-------+------------+------------------------+---------+----------+-------------------------------------------------------+----------------------------+----------+

I'm not sure why this is referring to a .scf file (which I had to look up what that was, a simulator channel file?), but maybe that's why there are issues. This should be in a .sdc file.

Try removing the .sdc file reported in the Report SDC (Set False Path) from the project directory and check if the timing path is reported between the flip-flops.

The asterisk (*) is likely not expanding because the SDC constraints were initially written in that format.

Regards,

Richard Tan

Hi,

Just dropping a note to check if my last reply was helpful to you.

Do you need any further assistance from my side?

Regards,

Richard Tan

I didn't check it , hopefully I will do it today , anyway I will update here if it was helpful or not .

Thanks

Or.

Hi,

Unfortunately, it didn’t help.

I’m not sure if I removed the .sdc file you asked me to remove. I removed these two files:

The output of the command the file report_sdc.txt

'report_sdc -file report_sdc.txt'

The .sdc file of the project, but then I couldn’t regenerate the timing report because it looks for the .sdc file in its initial steps.
So, I removed the .sdc file before issuing the command:

'report_sdc -file report_sdc.txt'
Bottom line, neither approach helped.

maybe I don't understand where to remove it .

Or.

If you want to expand all wildcards to a separate file, the correct command is

write_sdc -expand "<sdc file name>"

Hi,

I tried the additional step you suggested, but it still doesn’t resolve the issue. I used the command write_sdc -expand "expanded_sdc.sdc", but the output still includes lines like the following on the false path, and I don’t see it expanding the output delay constraints:

set_false_path -from [get_clocks {rx_*}] -to [get_clocks {pll_*}]
set_output_delay -add_delay -max -clock [get_clocks {tx_clk}] 47.000 [get_ports {DIE0_dib_pad_0_*_*[*]}]
set_output_delay -add_delay -min -clock [get_clocks {tx_clk}] 0.000 [get_ports {DIE0_dib_pad_0_*_*[*]}]

Any further suggestions?

Or.