Forum Discussion
OrF
Occasional Contributor
2 years agoFind where false_path was set.
Hi, I have a design where there is a physical path between two flip-flops (FF). However, when I try to generate a timing report, the Timing Analyzer shows “nothing to report.” I assume this might be...
sstrell
Super Contributor
2 years agoreport_sdc expands wildcards to list every path in the design and then references the .sdc file and line number where the constraint came from. So you can generate the report and search in the report for the path in question. Then the report will point you to the applied constraint(s).
If you're still not finding the path, then something else is going on.