Forum Discussion
OrF
Occasional Contributor
Occasional ContributorFind where false_path was set.
Hi, I have a design where there is a physical path between two flip-flops (FF). However, when I try to generate a timing report, the Timing Analyzer shows “nothing to report.” I assume this might be...
RichardT_altera
Super Contributor
Super ContributorTry removing the .sdc file reported in the Report SDC (Set False Path) from the project directory and check if the timing path is reported between the flip-flops.
The asterisk (*) is likely not expanding because the SDC constraints were initially written in that format.
Regards,
Richard Tan
