Read from memory

Hi,

I maked a mistake using non JTAG Master, now I use it, please find image attached.

These the code generated by Platform Designer:
module mem (
input wire clk_in_clk, // clk_in.clk
input wire memory_clk2_clk, // memory_clk2.clk
input wire memory_reset2_reset, // memory_reset2.reset
input wire memory_reset2_reset_req, // .reset_req
input wire [11:0] memory_s2_address, // memory_s2.address
input wire memory_s2_chipselect, // .chipselect
input wire memory_s2_clken, // .clken
input wire memory_s2_write, // .write
output wire [7:0] memory_s2_readdata, // .readdata
input wire [7:0] memory_s2_writedata, // .writedata
input wire reset_in_reset_n // reset_in.reset_n
);

I could connect into the DE1 board over the tcl, but I had the problem to continue, can you assist me in the tcl code attached.

Regards.

Hi,

Yes, Because I modified the design from JTAG to JTAG Bridge.

I'm trying to see if any communication can be done, and let you know.

Regards.

Hi,

When I execute tcl scripts, I get these errors:

Error: Failed to read data from FPGA memory. Result: ERROR: JTAG communication error is detected. It can be caused by the hardware failure and signal integrity in the JTAG chain. Try to restart.

while executing
"error "Error: Failed to read data from FPGA memory. Result: $result""
invoked from within
"if {$data_from_fpga == ""} {
error "Error: Failed to read data from FPGA memory. Result: $result"
} else {
puts "Debug: Data read from FPGA at..."
(file "receive_altera_FPGA.tcl" line 72)
------------------------------------------------

Error: Error executing TCL script:
------------------------------------------------
Error: Failed to read data from FPGA memory. Result: ERROR: JTAG communication error is detected. It can be caused by the hardware failure and signal integrity in the JTAG chain. Try to restart.

while executing
"error "Error: Failed to read data from FPGA memory. Result: $result""
invoked from within
"if {$data_from_fpga == ""} {
error "Error: Failed to read data from FPGA memory. Result: $result"
} else {
puts "Debug: Data read from FPGA at..."
(file "receive_altera_FPGA.tcl" line 72)
------------------------------------------------

Note that when I execute the script, I see that RX and TX LEDs inside FPGA near JTAG are flashing.

Please find attached the tcl file in text format.

Regards

Hi,

I tried the script to see if any editable memory, but I get : Warning (16702): No editable memory instance was found.
Editable memory instances: ERROR: No editable memory instances found.

I use OnChip Memory writable, please image attached.

The TCL Script:

set hw_name "DE-SoC \[USB-1\]"
set dev_name "@2: 5CSE(BA5|MA5)/5CSTFD5D5/.. (0x02D120DD)"

# List editable memory instances
puts "Listing editable memory instances..."
set mem_instances [get_editable_mem_instances -hardware_name $hw_name -device_name $dev_name]
puts "Editable memory instances: $mem_instances"

if {[llength $mem_instances] == 0} {
puts "ERROR: No editable memory instances found."
exit 1
}

Regards.

Hi,

Thank you for your reply.

I used system console, I write the commands as open_service ....then It works successfully, but when I write the commands as: master_read_memory, master_read_16, master_read_8 and even master_read_32, I get :

WARNING: This transaction has not completed in 10 seconds. System Console will keep trying for 50 more seconds.

GRAVE: master_read_memory: This transaction did not complete in 60 seconds. System Console is giving up.

Can you tell me if may be something is missing on the quartus project or OnChip memory configuration in Platform Designer.

Regards

Hello,

I tried many time using System console with the following commands:
%get_service_paths master
/devices/5CSE(BA5|MA5)|5CSTFD5D5|..@2#USB-1#DE-SoC/(link)/JTAG/alt_sld_fab_sldfabric.node_0/phy_0/jtag_master.master

% open_service master "/devices/5CSE(BA5|MA5)|5CSTFD5D5|..@2#USB-1#DE-SoC/(link)/JTAG/alt_sld_fab_sldfabric.node_0/phy_0/jtag_master.master"

% is_service_open master "/devices/5CSE(BA5|MA5)|5CSTFD5D5|..@2#USB-1#DE-SoC/(link)/JTAG/alt_sld_fab_sldfabric.node_0/phy_0/jtag_master.master"
1

% master_read_memory "/devices/5CSE(BA5|MA5)|5CSTFD5D5|..@2#USB-1#DE-SoC/(link)/JTAG/alt_sld_fab_sldfabric.node_0/phy_0/jtag_master.master" 0x00000000 8

When I writed the last comman system console displays the same issue even I try to follow the link instructions.

Regards.