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Yassine-Ca
New Contributor
New ContributorRead from memory
Hello, I'm working on DE1-SoC Cyclone V FPGA. I have prgrammed the FPGA to store a static data to the onchip memory created on Platform Designer, this generated the definitio...
sstrell
Super Contributor
Super ContributorThe address is right there in PD from 0x0 to 0xfff.
Yassine-CaNew Contributor
New ContributorHi,
Yes, Because I modified the design from JTAG to JTAG Bridge.
I'm trying to see if any communication can be done, and let you know.
Regards.
