DaveMM
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Does the 1SG280LU2F50E2VG support bitfile encryption
I am attempting to encrypt and load an image to the 1SG280LU2F50E2VG on our Stratix 10 GX development kit following the instructions in AN 970: Intel® Stratix® 10 Security Tutorial. When I attempt to download the "root.qky" to the FPGA I see: Info(209060): Started Programmer operation at Thu Feb 12 18:01:59 2026 Info(18942): Configuring device index 1 Info(18943): Configuration succeeded at device index 1 Info(20091): Programming public key on device 1 Error(209012): Operation failed Info(209061): Ended Programmer operation at Thu Feb 12 18:02:02 2026 Is the FPGA on the development kit compatible with encryption?12Views0likes3CommentsStratix 10 GX Transceiver IO pairs
Is there any way to configure a transceiver p/n pair to be two single ended general purpose IO? We are trying to use the Stratix 10 development kit FMC connector and would like to use the IO in FPGA banks 4A, 4B, and 4C in non-transceiver mode. The development kit documentation implies this can be done.41Views0likes3Comments- 1.2KViews0likes0Comments