10AX115H3F34E2SG, Laser marking
Dear INTEL/ALTERA Support Team, Good day. We previously purchased a batch of INTEL/ALTERA components from the authorized distributor ARROW and sold them to my client. Our client has raised concerns about the components having been re-marked. Model: 10AX115H3F34E2SG D/C: 2113, Lot Number: S848AK02TW, COO: Taiwan, Arrow Delivery ID: 011717919 We have received a statement regarding the product markings, which says: "De-mark/Re-mark is a qualified and controlled process within the manufacturing site. There is no impact on quality, reliability, and compliance with specifications on a de-marked/re-marked product." Attached please check our document. Could you please help verify the authenticity of this statement? Is it from Altera? We would greatly appreciate it if you could provide clarification to help address our client’s concerns. Hope to receive your feedback soon. Best regards, Carol Choi
Allow encrypted POF only
Hi! Can someone explain what this is security feature (Allow encrypted POF only) is supposed to do? In the description it says, "When enabled, devices accepts encrypted POF". However, this is not the case. After creating a .pof with "Allow encrypted POF only" and encryption, then loading this .pof + ekp file, everything after this first program/configure fails. This means you cannot program/configure/verify/blankcheck/examine with the same or different .pof/.ekp. The only solution is erase. But this feature should have allowed for encrypted pof to be programmed. Originally, I thought it would allow you to load a new .pof as long as you use the same key (.ekp). After experimenting with various cases, I cannot get pass the failure of reconfiguring the device. (CONFIG_DONE pin failed to go high in device 1. .... Operation Failed). The only solution is to erase. Which brings me back to the question of what is "Allow encrypted POF only" supposed to do? Can you provide procedures to get this feature to actual work? I am on Quartus Prime Standard Edition version 23.1 using a Max10 (m50) FPGA. Thank you!
The Verilog code was not actually programmed into the FPGA.
I have a question. I am using a 10M02SCM153C8G FPGA. I wrote a simple program, successfully programmed it onto the development board, and confirmed it produced the intended simple functionality. However, I've noticed that whenever I power cycle the evaluation board (by unplugging and replugging the USB cable), the board reverts to running the original sample code that was pre-loaded. This leads me to believe that although I performed the programming operation, the code was not actually programmed into the FPGA's non-volatile memory. Is there a specific option in the programming interface that I must select to ensure the code is permanently written to the FPGA's internal Configuration Flash Memory (CFM) block? As I recall, the MAX 10 series does not require an external SPI EEPROM for configuration, which I believe is correct. Does this also mean that if I do not select the correct programming option, the code is only loaded into the FPGA's volatile SRAM, and is therefore lost upon power-off?
Addressing PQC and CRA with Crypto-Agile Security in Agilex™ Devices
A look at today’s evolving security requirements affecting the semiconductor industry, including post-quantum cryptography (PQC) and the Cyber Resilience Act (CRA), and how Altera’s latest capabilities in Agilex™ 3 and Agilex™ 5 FPGAs and SoCs are helping to enable future-proof security functions today.
Must-See Sessions & Demos at FPGA Conference Europe 2025!
Explore the top sessions, keynotes, and live demos from Altera and its Solution Acceleration Partners at FPGA Conference Europe 2025 in Munich. From AI, robotics, and DSP innovations to high-speed networking and quantum-safe security—discover what’s next in FPGA technology.Robust Full-Lifecycle Security with Altera FPGAs
In today's world of interconnected devices, security design has become a critical requirement across all industries. Altera's FPGAs offer built-in, industry-leading security features that allow design engineers to easily protect their products without sacrificing valuable design time.
Intel Rolls Out Multi-Generation Infrastructure Processing Unit (IPU) Roadmap at Vision 2022
Intel IPUs were featured in two sessions at Intel Vision 2022, “Datacenter of the Future: Efficient, Secure, and Sustainable” on Day 1 and “How Software Defined & Programmable Platforms Will Fuel Your Innovation” on Day 2. Read more to learn what was revealed.Interested in IPUs for datacenters? Attend these three sessions at Intel Vision – May 10, 11
Three informative sessions at the Intel Vision conference–taking place at the Marriott Gaylord Texan and Convention Center outside of Dallas, Texas–will provide more insight into the advantages of IPUs and a look at the future of Intel IPUs.
We Hope to See You at Intel® FPGA Technology Day 2021
Intel® FPGA Technology Day (IFTD) is a free four-day event that will be hosted virtually across the globe in North America, China, Japan, EMEA, and Asia Pacific from December 6-9, 2021. The theme of IFTD 2021 is “Accelerating a Smart and Connected World.” This virtual event will showcase Intel® FPGAs, SmartNICs, and infrastructure processing units (IPUs) through webinars and demonstrations presented by Intel experts and partners. The sessions are designed to be of value for a wide range of audiences, including Technology Managers, Product Managers, Board Designers, and C-Level Executives. Attendees to this four-day event will learn how Intel’s solutions can solve the toughest design challenges and provide the flexibility to adapt to the needs of today’s rapidly evolving markets. A full schedule of Cloud, Networking, Embedded, and Product Technology sessions, each just 30 minutes long, will enable you to build the best agenda for your needs. Day 1 (December 6), TECHNOLOGY: FPGAs for a Dynamic Data Centric World: Advances in cloud infrastructure, networking, and computing at the edge are accelerating. Flexibility is key to keeping pace with this transforming world. Learn about innovations developed and launched in 2021 along with new Intel FPGA technologies that address key market transitions. Day 2 (December 7), CLOUD AND ENTERPRISE: Data Center Acceleration: The cloud is changing. Disaggregation improves data center performance and scalability but requires new tools to keep things optimized. Intel FPGA smart infrastructure enables smarter applications to make the internet go fast! Day 3 (December 8): EMBEDDED: Transformation at the Edge: As performance and latency continue to dictate compute’s migration to the edge, Intel FPGAs provide the workload consolidation and optimization required with software defined solutions enabled by a vast and growing partner ecosystem. Day 4 (December 9): NETWORKING: 5G – The Need for End-to-End Programmability: The evolution of 5G continues to push the performance-to-power envelop, requiring market leaders to adapt or be replaced. Solutions for 5G and beyond will require scalable and programmable portfolios to meet evolving standards and use cases. To explore the detailed program, see the featured speakers, and register for the North America event, Click Here. Register in other regions below: EMEA China Japan Asia Pacific
FPGA-Based Cloaking and Security Tech Helps Protect Equipment on IT and OT Networks from the Bad Guys
You can’t attack what you can’t see, and cloaking technology for devices on Ethernet LANs is merely one of many protection layers implemented in Q-Net Security’s Q-Box to protect networked devices and transaction between these devices from cyberattacks. Other security technologies built into the Q-Box include encryption, authentication, and the use of different, randomly generated security keys created just in time for each transaction – called JITKeys – with no external key management. Adding security to a networked device is as simple as placing a small Q-Box between a protected device and its LAN using an extra RJ45 cable. Each Q-Box can protect as many as 2000 network endpoints, allowing operators to create protected LAN segments throughout a larger network. Connect the Q-Box to a WAN router and the protected LAN segments can be located anywhere in the world. You can use the Q-Box to protect a wide range of networked devices including: Servers and PCs on IT networks Financial equipment ranging from ATMs in banks to slot machines in casinos Equipment connected to Operational Technology (OT) networks in buildings, factories, refineries, and utilities including PLCs and other industrial controllers, lighting systems, security systems and cameras, and even robotic equipment The Q-Box can secure any device on an Ethernet LAN. The Q-Box works with all networked devices including legacy systems. Face it. Cyberspace is getting more dangerous every day. Need proof? Here are just a handful of recent cyberattacks: December, 2020: Hackers inserted malicious code into SolarWinds’ Orion software, exposing sensitive and critical data at top government agencies including parts of the Pentagon, the Department of Homeland Security, the State Department, the Department of Energy, the National Nuclear Security Administration, and the Treasury; corporations including systems Microsoft, Cisco, Intel, and Deloitte; and other organizations including the California Department of State Hospitals, and Kent State University. 1 February, 2021: A Hacker attempted to poison the drinking water supply for Oldsmar, Florida by dangerously increasing sodium hydroxide levels in the water. 2 March, 2021: Hackers compromised more than 150,000 security cameras located in gyms, jails, schools, hospitals, and factories. 3 May, 2021: The DarkSide Russian hacking group forced Colonial Pipeline to cut the connection between its IT and OT networks, shutting down the company’s 5500-mile pipeline for several days and causing massive gasoline shortages on the US east coast. 4 Q-Net implemented the secure technology inside of the Q-Box using the programmable hardware in an Intel® Cyclone® FPGA. The Q-Box provides access protection without requiring changes or additions to an endpoint’s legacy code and with no modifications to existing equipment. In addition, the FPGA-based hardware in the Q-Box does not require and does not permit software updates or patches from the network. The network security protection it supplies is immutable. Because it’s implemented in hardware on an FPGA, the Q-Box introduces only a few microseconds of network latency. For more information about Q-Net Security’s Q-Box, click here. Notices and Disclaimers “SolarWinds Hack Victims: From Tech Companies to a Hospital and University,” The Wall Street Journal, https://www.wsj.com/articles/solarwinds-hack-victims-from-tech-companies-to-a-hospital-and-university-11608548402 “A Hacker Tried to Poison a Florida City's Water Supply, Officials Say,” Wired, https://www.wired.com/story/oldsmar-florida-water-utility-hack/ “Hackers just pulled off one of the most mind-boggling hacks of 2021 so far,” BGR Media, https://bgr.com/tech/security-cameras-hacked-verkada-customers-exposed/ “Intel® Agilex® FPGAs target IPUs, SmartNICs, and 5G Networks,” https://www.intel.com/content/dam/www/central-libraries/us/en/documents/agilex-fpgas-target-ipus-smartnics-5g-networks-white-paper.pdf Intel technologies may require enabled hardware, software or service activation. Intel does not control or audit third-party data. You should consult other sources to evaluate accuracy. No product or component can be absolutely secure. Your costs and results may vary. © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
