How to Generate Altera HAL for HPS?

Hi, I am using Quartus 26.1 with the Agilex 5 Modular Development Kit (Device number: A5ED065BB32AE6SR0) and I have a few questions about BSP Generation for Hard Processor System (HPS).  For reference I am following the Quartus Prime Pro Edition Version 26.1 User Guide. 

1. How do I generate Altera HAL for HPS? When I use the BSP Editor in platform designer, I can only generate the system.h file that only has macros for EMIF, even though other peripherals are also connected to the HPS. How do I generate macros for the H2F bridges and HAL API Files for the HPS? 

2. How do I input a SOPCINFO file into the BSP Editor? The Quartus Prime Pro Edition User Guide shows that I should be able to input SOPCINFO file as the system file (see above image) but Quartus only gives me the options of QSYS and IP file (see below image).   

Thank you for the help!