Nios II/f performance on Cyclone IV E

Hi,

I am trying to evaluate Nios II/f on a dev. board fitted with

EP4CE55F23C7. I've ported the Cyclone III Dhrystone example from Altera (Fast Nios

II Hardware Design Example) to my board. Design specs are:

* Nios II/f, 4 Kbytes i-cache, 2 Kbytes d-cache

* System clock: 140MHz

* JTAG debug module: Yes

* On-chip RAM: 64 Kbytes

* JTAG UART: 1

* Timer: 1

I've kept the settings, clock, build flags etc. same as in original example. When

running the dhrystone example I get:

...

Microseconds for one run through Dhrystone: 6.5

Dhrystones per Second: 153506.9

VAX MIPS rating = 87.369

This is way less than what the attached readme.txt states:

...This system achieves over 150 DMIPS on the Cyclone III FPGA Development Kit,

and can achieve over 190 DMIPS when targeting the fastest speed grade of a

CycloneIII device...

According to ds_nios2_perf.pdf MIPS/MHz ratio of Cyclone IV GX is the same as

Cyclone III LS and a bit higher than Cyclone III. Regardless of that MIPS != DMISP

I can't imagine such DMIPS/MHz ratio difference between Cyclone IV and III. Or

am I missing some difference with Nios2 between Cyclone IV GX and E?

Can somebody shed some light on this?

Thanks for your help.