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Altera_Forum
Honored Contributor
Honored ContributorNios II/f performance on Cyclone IV E
Hi, I am trying to evaluate Nios II/f on a dev. board fitted with EP4CE55F23C7. I've ported the Cyclone III Dhrystone example from Altera (Fast Nios II Hardware Design Example) to my board....
Altera_ForumHonored Contributor
Honored ContributorI'd guess at either code optimisation level or cache thrashing.
The Altera figure might be for tightly coupled memory (no cache line reads at all). The other possibility is the type of multiplier used - Altera won't let you throw large numbers of logic gates into a fast multiplier!
