CaptainPrice15
New Contributor
6 months agoPin allocation for PCIe HIP gen 2 x1 with Avalon-MM Interface
I wish to use the Intel HIP for cyclone 10GX with a F780 package. I wish to use only 1 lane of PCIe 2.0 with Avalon-MM as interface. The quartus software is allowing me to place the tx pin pair only on the pins W28 and W27, the rx pin pair only on pins v26 and v25.
The worse part being that it is allowing me to place the 'perst' pin only on the pin AB11 which is impossible for me. I am already uisng this pin, and the bank 2A (which contains the pin AB11) with an IO Voltage of 1.35V while the 'perst' pin needs 1.8V.
Is there any wayout from this? I do not wish to redesign my custom board and change all the connections from bank 2A only for the 'perst' pin to get the pin AB11.
Any quick help is appreciated.
Thanks in advance!