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And you are right - I don't know what to look for =(
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That's ok, everyone has to start somewhere.
The problem you are facing, is that the FPGA handbook tells you all the different voltages the I/Os can be operated at, and the Quartus II software must support all those modes. Once an FPGA is physically placed on a board, its VCCIO functionality is reduced to whatever the board supports; often its only one voltage. You then need to provide this information to Quartus II so it can program the I/O buffer logic correctly; this is a
constraint.
Here's how you figure it out what VCCIO voltage setting is on your board;
1. You indicate you want to use the GPIOs, so first you find them in the schematic - pages 16 and 17. The signals are called IO_xx at the connector, and then GPIO_xx at the resistors.
2. The GPIO_xx signals come from the FPGA. Go look on pages 9 and 10. The signals come from BANK4, 5 and 6.
3. Now go to page 12, where the power pins for the FPGAs are. Notice how the VCCIO signals have numbers after them. These are the BANK numbers. You can see that they are all connected to a power rail called VCCIO.
4. Change to page 20. Look for VCCIO. It is connected to VCC33.
So, the GPIO bus, and all other I/O signals on the FPGA are powered at 3.3V.
Cheers,
Dave