Hello Support,Today suddently, I could not configure anymore my Agilex 7-I Dev Kit.I got the following message :

I reconfigured the MAX10 with the factory pof as suggested in the forum, same problem.Is my board broken ?Any help ?Thank youSerge

Hi Serge93, Thanks for reporting this. Please try these quick steps: On the host, restart the JTAG server and run jtagconfig, or use the JTAG Chain Debugger to isolate the issue. Refer: JTAG error (Unexpected error in JTAG server Return the board to factory default switch settings and select the on‑board Download Cable as the JTAG source. Refer: Factory Default Switch Settings Temporarily bypass the FPGA in the JTAG chain (SW5.2 or SW8.2 by board revision), then attempt a Board Restore to recover the MAX 10 and factory image. Refer: JTAG chain broken after FPGA configuration If it still fails, try an external USB‑Blaster II and reduce the JTAG clock in Programmer. Please share your kit ordering code and the output of jtagconfig --debug after step 3. Regards,Fakhrul

Hello Fakhul,I already did all what you said including trying to access the board through the BTS. I was able to reconfigure the MAX10 by bypassing the FPGA but it changed nothing. The Agilex 7i is impossible to configure even with an external USB Blaster with reduced clock. kit ordering code : AGIPCIe8100650 / N24193-001The Result of jtagconfig --debug is : [niosv-shell] C:\Users\serge\AppData\Local\quartus> jtagconfig --debug1) AGI FPGA Development Kit [USB-1](JTAG Server Version 25.3.1 Build 100 12/19/2025 SC Pro Edition)Unable to read device chain - JTAG chain brokenCaptured DR after reset = ()Captured IR after reset = ()Captured Bypass after reset = ()Captured Bypass chain = ()JTAG clock speed auto-adjustment is enabled. To disable, set JtagClockAutoAdjust parameter to 0JTAG clock speed 24 MHzThanks for help.Serge

Hi Serge,Thanks for the update. Could you try below: Return all switches to Default Settings. Include: SW2[1:3] = OFF/OFF/OFF (JTAG mode), SW5.1 = OFF (on‑board Download Cable), SW5.2 = OFF (FPGA in chain), SW5.3 = ON (MAX 10 JTAG enabled). If your board uses SW8 instead of SW5, use the equivalent entries in the same table. Refer: Default Settings tables. Check the D6 Power Good LED. Blue ON means all rails are good. If OFF, address power first. Refer: LEDs table. In BTS, open Power Monitor GUI and capture the rail status screenshot. Refer: “Monitor On‑board Power through Power Monitor GUI.” In Quartus Programmer, run JTAG Chain Debugger and share the integrity report if auto‑detect still fails. Intel help recommends this when the chain cannot be scanned. Perform Board Restore through Quartus Prime Programmer, then power cycle and retry JTAG. Refer: “Perform Board Restore through Quartus Prime Programmer.” You may refer to this user guide for the above steps: Agilex™ 7 FPGA I-Series Development Kit User GuideIf the chain is still broken with the FPGA in the path after the above, it suggests a board‑side JTAG issue, it can indicate a board integrity problem once power and connections are confirmed. We can proceed with RMA. Please also share clear photos or a list of the current SW1–SW6/SW8 positions. Regards,Fakhrul

Hello Fakhul,So,About (1) : I have set all the switches as asked, please see the picture attached. About (2) : Unfortunately The LED D6 is Off.About (3) : See the picture attached, I cannot communicate with the board, So I cannot get any voltage value.About (4) : Please see the attached picture.About (5): I had to use the J10 instead of J8 to be able to reconfigure the MAX10, otherwise I cannot get the JTAG chain and so I cannot configure the MAX10. I power cycle and the JTAG is still the same...Thank you for your help.Serge

JTAG Chain Broken on Agilex 7-I Dev Kit | Altera Community

18 Replies

Serge93
Occasional Contributor
1 month ago
I reconfigured the MAX10 with the factory pof as suggested in the forum, same problem.
Is my board broken ?
Any help ?
Thank you
Serge
- FakhrulA_altera
  Regular Contributor
  1 month ago
  Hi Serge93,
  
  Thanks for reporting this. Please try these quick steps:
  
  On the host, restart the JTAG server and run jtagconfig, or use the JTAG Chain Debugger to isolate the issue. Refer: JTAG error (Unexpected error in JTAG server
  
  Return the board to factory default switch settings and select the on‑board Download Cable as the JTAG source. Refer: Factory Default Switch Settings
  
  Temporarily bypass the FPGA in the JTAG chain (SW5.2 or SW8.2 by board revision), then attempt a Board Restore to recover the MAX 10 and factory image. Refer: JTAG chain broken after FPGA configuration
  
  If it still fails, try an external USB‑Blaster II and reduce the JTAG clock in Programmer.
  
  Please share your kit ordering code and the output of jtagconfig --debug after step 3.
  
  Regards,
  Fakhrul
  - Serge93
    Occasional Contributor
    1 month ago
    Hello Fakhul,
    I already did all what you said including trying to access the board through the BTS. I was able to reconfigure the MAX10 by bypassing the FPGA but it changed nothing. The Agilex 7i is impossible to configure even with an external USB Blaster with reduced clock.
    kit ordering code : AGIPCIe8100650 / N24193-001
    The Result of jtagconfig --debug is :
    [niosv-shell] C:\Users\serge\AppData\Local\quartus> jtagconfig --debug
    1) AGI FPGA Development Kit [USB-1]
    (JTAG Server Version 25.3.1 Build 100 12/19/2025 SC Pro Edition)
    Unable to read device chain - JTAG chain broken
    Captured DR after reset = ()
    Captured IR after reset = ()
    Captured Bypass after reset = ()
    Captured Bypass chain = ()
    JTAG clock speed auto-adjustment is enabled. To disable, set JtagClockAutoAdjust parameter to 0
    JTAG clock speed 24 MHz
    Thanks for help.
    Serge
Serge93
Occasional Contributor
1 month ago
Hello Fakhul,
So,
About (1) : Yes it is the first time, the board was working well for several months, and one day when I was debugging a new IP, I did several power cycle, and suddenly I could not configure the board, it was amazing.
About (2) : My serial number is 8100650, so DK-DEV-AGI027-RA and AGIB027R29A1E1VB
About (3) : Please see the picture attached
About (4) : I was unable to find you 'Device info -> Read Device Info' menu, where it is ?
About (5) : I using the board only in 'Bench Power Mode'. So no, LED D6 is off.
Thank you for help.
Serge
- FakhrulA_altera
  Regular Contributor
  1 month ago
  Hi Serge,
  
  Thanks. Since you are on bench power and D6 Power Good LED is OFF, the board rails are not up. That explains BTS showing no rails and the JTAG errors. The user guide defines D6 = Power Good (blue ON = all powers good, OFF = power fault) and shows bench power on J11 with SW6 = ON.
  
  About (4) : I was unable to find you 'Device info -> Read Device Info' menu, where it is ?
  It in the Configuration Debugger:
  
  Please check these exactly as in the guide:
  Connect the 240 W adapter to J11, set SW6 = ON, card not in a PCIe slot, then cold power cycle. Does D6 turn blue.
  If D6 is still OFF, measure 12 V at J11 if you can, and share one photo showing the J11 plug and SW6.
  If D6 remains OFF after step 1, this points to a board power fault.
  Regards,
  Fakhrul
  - Serge93
    Occasional Contributor
    1 month ago
    Hello Fakhrul,
    I tried to read the Device info, but it was impossible.
    I measured the 12V at J11. The 12V is always present with SW6 Off or SW On. D6 reamins always Off.
    Please see the picture attached of the baord with SW6 On. You will see D6 Off and the Fan On, i.e. the Power is on.
    Thank you for help.
    Serge

Forum Discussion

JTAG Chain Broken on Agilex 7-I Dev Kit

18 Replies

Recent Discussions

MAX10 Dual Configuration

Cyclone I (EP1C3) Configuration Issues: Sequence and Environment Dependent Failures

EMIF Pin Assignment for Agilex 7 FPGA I-Series DevKit (DK-DEV-AGI027R1BES)

Quartus Prime Pro 25.1 fatal error during fitter: Windows "Efficiency mode" required

Step Load conditions