Forum Discussion
New ContributorASx4 Interface debug in MSEL=111 (JTAG mode)
Hi,
could you, please, help me understand what is happening here:
I am working with an Agilex3 FPGA (fuses are on factory default, no keys programmed, etc.)
MSEL=111, so we are in JTAG mode
I am trying to debug the NOR flash interface through Configuration Debugger / QSPI Controller and SFDP page.
I have connected an oscilloscope. When I press Read button without QSPI Debug Session Activate button pressed, I see some NOR flash transactions on the oscilloscope and get back an Error 0x515 Unknown error and nothing is read in the SFDP window. So I try the QSPI debug session active way, and when I press it I get a lot of content but anything below the SFDP line in the tree structure is random at each read button press AND I do not see any NOR flash transaction at all on the ASx4 interface.
(Did it several time, so yes, I did not forgot press the trigger active button.)
So questions:
- is this an expected behavior? Copilot suggest that ASx4 interface is not initialized when MSEL=111 and I am reading some internal "garbage"
- If this is expected, should not the Quartus Programmer tool (which reads MSEL=111 correctly) warn me that I should not expect any meaningful output in this debug window?
- Is there any way to use the JTAG interface here as supposed: test the interfaces for problems? if yes, how?!
(I stuck for a few more days/weeks with MSEL=111, so if that is the solution just let me know.)
Thanks,
Peter
5 Replies
FvMSuper Contributor
Hi Peter,
it's no explicitely mentioned in AN955 (Configuration Debugger Tool manual), but I doubt that debugging QSPI works in non-AS configurations.
Regards
Frank- dpcsu
Hi Frank,
thank you. Unfortunately looks like this. I also did not find any explicit mention. Nevertheless I would appreciate from Altera when there would be a warning message in the console log (at least) that I am trying to do something not supported. Since having SDM I found no way of testing the memory connection over JTAG when something is wrong. In the BSDL file there are no IO buffers defined for the SDM_IOxx either.
What was by the way a strange thing in the AN995 that it was mentioning that I have the ASx4 debugging available when the FPGA programmed with an active serial x4 enabled image. So the question is that setting also part of the SRAM image I am programming? does the FPGA know that the .sof image I program supposed to be read normally from NOR over ASx4?
Or it is more related to the MSEL inputs only and nothing else.
Thanks,
Peter
JohnT_AlteraRegular Contributor
Hi,
You will be able to access the QSPI Flash when you are using MSEL set to JTAG mode. https://docs.altera.com/r/docs/847422/25.3.1/device-configuration-user-guide-agilextm-3-fpgas-and-socs/debugging-guidelines-for-the-as-configuration-scheme
May I know which board are you using and if you are using custom board, can you share with me your board schematic so that I can understand what is actually causing the issue?
If you are able to provide some screenshot of the SFDP then it will be also provide some basic information.- JohnT_Altera
Hi Peter,
May i know if you have the updated information?
dpcsu_ehi John,
we reworked the design. Will be fine.
