dpcsuNew Contributor3 months agoASx4 Interface debug in MSEL=111 (JTAG mode) Hi, could you, please, help me understand what is happening here: I am working with an Agilex3 FPGA (fuses are on factory default, no keys programmed, etc.) MSEL=111, so we are in JTAG mode I am ...Show More
Recent DiscussionsError (209014): CONF_DONE pin failed to go high in device 1.Agilex 3: VCCBAT pin for the battery-backed key storage.Regarding the Footprint creation of AGFB022R24C2E2VDedicated Clock Pins for MAX 10SolvedLicence in Altera 2 Complete Design Suite version 13.0 SP1 For cyclone 1