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Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- What I am doing wrong? --- Quote End --- You're expecting magic. The FPGA I/O constraints must be set to match the I/O voltage (VCCIO), it does not happen the other way around. You need to check the DE1 schematic and then match the constraints to the schematic. Its quite possible that the board has a jumper to set the VCCIO for the GPIO header. You would also be able to find that in the schematic. If you cannot figure out what you are looking for, post the DE1 schematic and I'll look at it for you. Cheers, Dave