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Altera_Forum's avatar
Altera_Forum
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14 years ago

About maximum RAM data rate in Stratix II

I want to store the data acquired by a ADC for later processing.The data rate is 250MHz and data width is 32bits. I generated a 256*32bits 1-port RAM with 250MHz inclk and 100MHz outclk by megafunction.But the read data looks "dirty" after writing.Then I reduced the capacity of the RAM to 128*32 according to the section "TriMatrix Embedded Memory Blocks in Stratix II and Stratix II GX Devices" in the handbook. I use a ROM signal source as clean input data to debug the code.The result of simulation looks right but the result from practice circuit show "dirty" data again.

I also generate a same size FIFO with 250MHz inclk and 100MHz outclk by megafunction.It can work well.

I guess the maximum RAM data rate is slower than FIFO,but I wonder the available value."TriMatrix Embedded Memory Blocks in Stratix II and Stratix II GX Devices" shows the maxmum data rate is up to 400MHz!

Could anyone give me help?

Thanks.

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    Which megafunction did you use?

    Dual Port RAM or Dual Clock FIFO?

    --- Quote End ---

    1 port RAM and dual clock FIFO
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Whatever you build, the best one to tell you is the tool itself.

    You set your clock speeds in sdc and see what fmax is achieved whether in the logic fabric or the ram blocks...
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    --- Quote Start ---

    Whatever you build, the best one to tell you is the tool itself.

    You set your clock speeds in sdc and see what fmax is achieved whether in the logic fabric or the ram blocks...

    --- Quote End ---

    I set the clock speeds at 250MHz and the achieved fmax is about 300MHz in the Classic Timing Analysis report.

    Could you please tell me where to find the fmax of the logic fabric or the ram blocks in detail? And what is sdc?

    Thanks.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    If you are using classic timing analyser then you don't need sdc. All you need is enter clock details, as well as tSU/tH/tCO for external interfacing.

    If you have achieved 300MHz then that's it. If the ram block can't go that fast then the tool will not give you that fmax.