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Altera_Forum's avatar
Altera_Forum
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15 years ago

About maximum RAM data rate in Stratix II

I want to store the data acquired by a ADC for later processing.The data rate is 250MHz and data width is 32bits. I generated a 256*32bits 1-port RAM with 250MHz inclk and 100MHz outclk by megafuncti...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Whatever you build, the best one to tell you is the tool itself.

You set your clock speeds in sdc and see what fmax is achieved whether in the logic fabric or the ram blocks...