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Honored Contributor
Honored ContributorAbout maximum RAM data rate in Stratix II
I want to store the data acquired by a ADC for later processing.The data rate is 250MHz and data width is 32bits. I generated a 256*32bits 1-port RAM with 250MHz inclk and 100MHz outclk by megafuncti...
Altera_ForumHonored Contributor
Honored ContributorIf you are using classic timing analyser then you don't need sdc. All you need is enter clock details, as well as tSU/tH/tCO for external interfacing.
If you have achieved 300MHz then that's it. If the ram block can't go that fast then the tool will not give you that fmax.
