Forum Discussion
Altera_Forum
Honored Contributor
15 years agoAbout maximum RAM data rate in Stratix II
I want to store the data acquired by a ADC for later processing.The data rate is 250MHz and data width is 32bits. I generated a 256*32bits 1-port RAM with 250MHz inclk and 100MHz outclk by megafuncti...
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- Whatever you build, the best one to tell you is the tool itself. You set your clock speeds in sdc and see what fmax is achieved whether in the logic fabric or the ram blocks... --- Quote End --- I set the clock speeds at 250MHz and the achieved fmax is about 300MHz in the Classic Timing Analysis report. Could you please tell me where to find the fmax of the logic fabric or the ram blocks in detail? And what is sdc? Thanks.