Forum Discussion
New ContributorStratix 10 Linux SD card booting
Hi Altera Community,
I tried multiple attempts to boot the SD card from Rocketboard.org.
https://releases.rocketboards.org/
I downloaded and booted the SD card with the .wic image file. It only has the .itb file by default in the boot partition. Whenever I try to boot, it asks for the U-Boot.img file. And also it says "failed to load "socfpga_stratix10_socdk.dtb" even if the file is there. And then I compiled my simple HPS design and can easily program the FPGA from the Quartus Programmer (rbf and sof file), but whenever I try to overlay it, like say:
echo overlay.dtb > /sys/kernel?config?device-tree/overlays/0/path
It says "FPGA manager error, timeout," and so on. Does any community member have notes or steps that you made to boot the SD card of the Stratix 10 FPGA?
I am following this link:
https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderStratix10
11 Replies
SueC_AlteraContributor
Hi Bishnu,
Rocketboards is being decommissioned. We have a new site:
Please refer to: https://altera-fpga.github.io/rel-26.1/
https://altera-fpga.github.io/rel-26.1/embedded-designs/stratix-10/sx/soc/gsrd/ug-gsrd-s10sx-soc/
Regards,
Sue
BishnuHi, Suec,
I know this, and I have been following this. But the problem is that it is not clear.
I followed these steps and flashed the .jic file to the Stratix10 FPGA, and then the minicom suddenly stopped, and I couldn't boot the SD card. May be i have flashed with the wrong variant of jic image. It would be better if there were a clear tool flow rather than a lot of information. Stratix 10 also has many variants from SX to AX. It doesn't mention these things as well.
HectorC_AlteraHi Bishnu,
Let me try to help you with this issue. Are you using a development kit?
- Could you share the model and vendor? if you have a link to the development kit support web page it would be great.
With that that information I can provide better guidance to get the board up and running.
- Bishnu
Hi Hector,
I have an S10 SX development kit in my lab. I want to design the SD card for this board (Do Altera recommend using the Rocket board image file?). If there is a flow diagram from Altera, it will be helpful. Rocket board has a lot, a lot of information, and it is difficult to digest.
Prior to that, I already did the same thing from the DE10 standard board (Terassic); it was very smooth. But these Stratix boards have SDM, and other architectures are different. - HectorC_Altera
Hi Bishnu,
For the S10 SX devkit I would recommend using the images provided in te Altera Developer Site.
You have two options as starting points (The links are for releases using Quartus 26.1 pro, but you can find binaries and instructions for other releases in the developer site):
HPS GSRD User Guide: This is a full system example design that builds the whole software stack using Yocto (u-boot, kernel and Linux FS).
HPS Linux Boot System Example Design: Hardware wise this design is the same as the previous reference, but this guide doesn't use Yocto to build the system software. This document will guide you to build each software component independently and guides you through the process fo putting together a bootable SD card for the devkit.
Start with Exercise Prebuilt Binaries for a bring up sanity check of your devkit (focus on the Boot from SD card as this seems to be your use case ). Once you can confirm that Linux boots in your board, you can continue with the Rebuild the Binaries if you are interested in build a Linux distribution with Yocto or jump to Boot From SD Card Example if Yocto is not an option for you.
You can find a build flow chart in Rebuild the Binaries section from the GSRD, just keep in mind that it is mean for when you are using Yocto.
Let me know if you have any question or if you run into an issue while running the binaries.
- Bishnu
Hi Hector,
Thank you for this help. I followed these steps, and I am used to it as of Now. I have 1 more question:
For this SX development Kit, there is information on the Internet (The one you referred me to, I did that before). But my main question is, there are other variants of the Stratix board as well:
Like: Stratix 10 GX, Stratix 10 DX, SX, TX, and many. The recent RF series, as well as the AX version.
I want to know if the GSRD procedure is the same for all the boards apart from register numbers (Pins).
My understanding is that the procedure should be the same for all the boards (Apart from PINs and register numbers)- HectorC_Altera
Hi Bishnu,
The procedure for running Linux on a Stratix 10 board is virtually identical across all models, as they all share the same HPS SoC.
All of them share the same Device Tree, U-boot and Linux kernel source files. The OS build flow will be the same, but the Quartus hardware project must be regenerated to target the specific device. Also, the Device Tree must be adjusted for the peripherals that will be used.
In short, source files and flow are shared among all Stratix 10 devices, but the binaries need to be recompiled for the specific FPGA/devkit.
Let me know if you have any further questions. If you are good to go for now, please mark this topic as solve.
Regards
- Bishnu
Hi Hector,
Yes, virtually they should be the same.
I boot the SD card from the Rocket board, and then I insert it into the FPGA, while I am doing minicom, I got this error. u-boot.img error - - 2
I have a question, do I need to flash the FPGA with the .jic file of a particular board (Suppose it can be SX, DX, TX, AX, whatever)? What if I compiled the GSRD design successfully, got the sof file, changed to the rbf file, and tried to boot it, and got an error like:
1. Do I need to program the MT25QU02G device with jic file, and then I reboot the FPGA (Minicom).2. Just wondering what standard operating procedure is for Stratix 10 Board for HPS (Linux Booting).
Thank you.
- HectorC_Altera
Hi Bishnu ,
Sorry for the late response.
The Agilex 7 boot process is explained in great detail in the Agilex™ 7 SoC FPGA Boot User Guide. All the next information assumes that you are going to boot the HPS first and then you are going to configure the fabric as described here. Addressing your questions:
1. Do I need to program the MT25QU02G device with jic file, and then I reboot the FPGA (Minicom).
If you are trying to exercise the binaries yes, you need to load the JIC and flash the SD card with the provided image. See my next answer to know why you need both.
2. Just wondering what standard operating procedure is for Stratix 10 Board for HPS (Linux Booting).
The HPS boot process requires 2 parts to work:
- You need a First Stage Boot Loader (FSBL) start the HPS and configure a minimal set of peripherals an prepare the system to load an OS.
- The FSBL its embedded into the FPGA configuration file. You can use a JIC file (with the onboard QSPI) or you use an RBF file and load it with the Quartus programmer through JTAG. The following link has more information about this.
- A Second Stage Boot Loader (SSBL) brings-up the FPGA fabric and load an OS.
For our GSRDs the flow that we use is as follows:
- Compile the Quartus Hardware project
- Break the resulting SOF file into RBFs for the HPS only and Core only.
- Build the Yocto project including the Core RBF from the previous step
- Update the HPS configuration file with the FSBL generated with the Yocto compile and create a JIC file from it.
- Flash the SD card image generated by Yocto. This image includes the SSBL and the RBF to configure the FPGA fabric.
Then, to boot the system follow the next steps:
- Insert the SD card into the Development Kit
- Load the HPS bitstream (JIC file) into the devkit QSPI (MT25QU02G) and change the MSEL in the board to start from the QSPI or load the HPS bitstream with JTAG (this requires an RBF instead of a JIC file).
You need to take in consideration that you cannot mix SD cards and JIC files, or in other words FASBL and SSBL. For example, you cannot take the SD card generated for project A and use the JIC file from project B, this also holds true for different families, you cannot reuse a SD card from a SX device with a TX device.
To really understand the flow I recommend that you follow all the Rebuild the Binary section from the GSRD.
Regards
- HectorC_Altera
- You need a First Stage Boot Loader (FSBL) start the HPS and configure a minimal set of peripherals an prepare the system to load an OS.
