How to program FPGA in Arria 10 HPS?

Hello,

Thank you for your comments.

The document you provided was very helpful.

But I have below several questions.

• It seems that the feature you mentioned is similar to Early IO Release feature.
  Is this right?
• It seems that there is some customizing point in SPL for early IO release feature.
  In fit_spl_fpga.its, rbf file is described as "fpga-periph-1", "fpga-core-1" name.
  But in SPL code, rbf file is loaded using specific names("fpga-core", "fpga-periph").
  (first_loading_rbf_to_buffer(), drivers/fpga/socfpga_arria10.c)
  I want to modify some names(fpga-periph-1, fpga-core-1) in fit_spl_fpga.its.
  (fpga-periph-1 -> fpga-periph, fpga-core-1 -> fpga-core)
  Is this the correct way for this feature?
• some functions releated with fpga is not called.
  It seems that spl_fit_load_fpga()(in spl_fit.c) function is not called.
  Is this code not used in Arria 10?

Thank you.

Regards,

Jung.

Hi, Aik Eu.

Thanks for your comments.

Okay, I understand that you mentioned.

core.rbf: related to FPGA design

periph.rbf: related to DDR to work first in order to boot up properly.

I previously mentioned that there is an error in u-boot.

The logic of uploading rbf files was skipped because of mismatch configuration name. But error log is not printed.

(u-boot-socfpga/drivers/fpga/socfpga_arria10.c)

static int first_loading_rbf_to_buffer(struct udevice *dev,
				struct fpga_loadfs_info *fpga_loadfs,
				u32 *buffer, size_t *buffer_bsize,
				size_t *buffer_bsize_ori)
{
//...

	for (i = 0; i < count; i++) {
		images_noffset = fit_conf_get_prop_node_index(buffer_p,
							     confs_noffset,
							     FIT_FPGA_PROP, i);
		uname = fit_get_name(buffer_p, images_noffset, NULL);
		if (uname) {
			debug("FPGA: %s\n", uname);

			if (strstr(uname, "fpga-periph") && // "fpga-periph-1" in fit_spl_fpga.its
				(!is_fpgamgr_early_user_mode() ||
				is_fpgamgr_user_mode() ||
				is_periph_program_force())) {
				fpga_node_name = uname;
				printf("FPGA: Start to program ");
				printf("peripheral/full bitstream ...\n");
				break;
			} else if (strstr(uname, "fpga-core") && // "fpga-core-1" in fit_spl_fpga.its
					(is_fpgamgr_early_user_mode() &&
					!is_fpgamgr_user_mode())) {
				fpga_node_name = uname;
				printf("FPGA: Start to program core ");
				printf("bitstream ...\n");
				break;
			}
		}
		schedule();
	}
	
	if (!fpga_node_name) {//foga_node_name is null.
		debug("FPGA: No suitable bitstream was found, count: %d.\n", i);//because of log level, this log is not printed.
		return 1;
	}
//...
}

Don't care about that.

I am trying to upload rbf files using u-boot command.

This is related to #option1 that you mentioned.

The documentation explains how to upload rbf files using sd card.

But, I can't use sdmmc dauter card, and I am using QSPI boot mode.

So, Is there any way to load rbf files using usb?

Thank you.

Regards,

Jung.

Hi, Aik Eu.

The fit_spl_fpga.its file is in u-boot code not document file.(https://github.com/altera-opensource/u-boot-socfpga/blob/socfpga_v2024.01/board/altera/arria10-socdk/fit_spl_fpga.its)

The command was not typo error.

In order to use fpga-core configuration name, I used this command.

I think any further conversation is meaningless.

Thank you for support.

Regards,

Jung.

Hello, Leo26.

Thank you for comment.

I tried to program rbf files by using programming FPGA from HPS.

But, I still have some problem for using HPS-to-FPGA bridges.

The documents that you mentioned may be helpful to me.

I visit the site you mentioned. But it is hard to find the documents.

I would appreciate it if you could provide a url to that document.

Thank you.

Regards,

Jung.

Hello, Kenny.

My team will use Agilex5 instead of Arria10.

So, I don't need the answer about this issue.

I appreciate your supports.

Regards,

Jung.