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sunyeong's avatar
sunyeong
Icon for New Contributor rankNew Contributor
2 years ago
Solved

How to program FPGA in Arria 10 HPS?

Hello, I'm reading the below rocketboards document about how to program an FPGA from HPS. GSRD131ProgrammingFPGA According to this document, rbf file is little differnt with Arria10. It seems ...
Hps Boot
Hps Debug
Sw Development
  • aikeu's avatar
    aikeu
    2 years ago

    Hi sunyeong,


    You can refer to this document on building the bootloader method using Arria10:

    https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10


    Arria 10 FPGA configuration is done in two steps:

    Configuration of periphery(periph.rbf): this allows HPS DDRAM to be brought up, and must do be done in SPL

    Configuration of fabric(core.rbf): it configures the actual FPGA core fabric, and can be done from SPL or U-Boot


    Thanks.

    Regards,

    Aik Eu


aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi sunyeong,


You can refer to this document on building the bootloader method using Arria10:

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10


Arria 10 FPGA configuration is done in two steps:

Configuration of periphery(periph.rbf): this allows HPS DDRAM to be brought up, and must do be done in SPL

Configuration of fabric(core.rbf): it configures the actual FPGA core fabric, and can be done from SPL or U-Boot


Thanks.

Regards,

Aik Eu


sunyeong's avatar
sunyeong
Icon for New Contributor rankNew Contributor
2 years ago

Hello,

Thank you for your comments.

The document you provided was very helpful.

But I have below several questions.

  • It seems that the feature you mentioned is similar to Early IO Release feature.
    Is this right?
  • It seems that there is some customizing point in SPL for early IO release feature.
    In fit_spl_fpga.its, rbf file is described as "fpga-periph-1", "fpga-core-1" name.
    But in SPL code, rbf file is loaded using specific names("fpga-core", "fpga-periph").
    (first_loading_rbf_to_buffer(), drivers/fpga/socfpga_arria10.c)
    I want to modify some names(fpga-periph-1, fpga-core-1) in fit_spl_fpga.its.
    (fpga-periph-1 -> fpga-periph, fpga-core-1 -> fpga-core)
    Is this the correct way for this feature?
  • some functions releated with fpga is not called.
    It seems that spl_fit_load_fpga()(in spl_fit.c) function is not called.
    Is this code not used in Arria 10?

Thank you.

Regards,

Jung.