Forum Discussion
Agilex 5/3 FreeRTOS SMP Support
Hello again!
May i ask another question?
In _mmu_configure function, setup_pagetable.c file:
/*tcr_el1 = 0x18 | (0x1 << 8) | (0x1 << 10) | (0x3 << 12) | (0x1 << 23);*/
tcr_el1 = 0x18 | ( 0x1 << 23 );
Why is the caching of MMU page table walk is disabled (top line commented out)?
The pages are lies in cacheable memory, so table walks should be also cacheable, isn't it?
I working on my own little baremetal application, and very interested in MMU setup methods...
Thanks in advance!
Regards, Vlad.
Hi Vlad,
You are right to point that out. The current implementation has a slight performance reduction compared to the line of code that is disabled. We have not enabled it as it isn't fully tested. From what I see, it's should be fine to enable it and run it. Once this is fully tested, it will be available in the next release.
Thanks,
Kevin