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sth125's avatar
sth125
Icon for New Contributor rankNew Contributor
2 years ago
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Warning (13028): Removed fan-out from the always-disabled I/O buffer....

Hello,

I am getting the following warnings related to two 74541 Octal Buffers (See image below):
Warning (13027): Removed fan-outs from the following always-disabled I/O buffers
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|12" to the node "DSP1_EMIF1_D[3]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|14" to the node "DSP1_EMIF1_D[2]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|7" to the node "DSP1_EMIF1_D[1]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|5" to the node "DSP1_EMIF1_D[0]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|24" to the node "DSP1_EMIF1_D[15]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|26" to the node "DSP1_EMIF1_D[14]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|19" to the node "DSP1_EMIF1_D[13]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|17" to the node "DSP1_EMIF1_D[12]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|12" to the node "DSP1_EMIF1_D[11]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|14" to the node "DSP1_EMIF1_D[10]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|7" to the node "DSP1_EMIF1_D[9]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst46|5" to the node "DSP1_EMIF1_D[8]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|24" to the node "DSP1_EMIF1_D[7]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|26" to the node "DSP1_EMIF1_D[6]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|19" to the node "DSP1_EMIF1_D[5]"
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|17" to the node "DSP1_EMIF1_D[4]"

DI_INT_CS4_ is not connected. Is that is what is causing the warning?

I connected DI_INT_CS4_ to Vcc, but I am still getting the warning

I had thought the two 74541 would be removed during the compilation. The reason for not connecting DI_INT_CS4 is that I use the design in two CPLDs. One of the CPLDs uses part of the design and the other CPLD uses the other part of the design.

Is there a setting that would allow the compiler to remove the parts of the design that are not used.

Thanks,
Steven

Compilation
  • sstrell's avatar
    sstrell
    2 years ago

    So what is the issue and your goal at this point? You have disabled tri-state buffers that are not being used in the design.

    Also, it should be mentioned that there is no tri-state logic internal to the FPGA fabric, only in the I/O cells, so that may be part of the issue here as well. Note "I/O buffer" in the warning.

    If you are trying to determine what resources are being used and what has been removed, use the Technology Map Viewer (Post-fitting) to see a schematic of the used device resources post-fit.

7 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    If DI_INT_CS4_ is pulled up, the output of that NAND gate will always be high so the buffers will never be active. You should ground that signal and control the other signal into that NAND gate to activate (or deactivate) the buffers.

    As for splitting the design between two devices, you need two Quartus projects to do this anyway, so just delete what shouldn't be in one device or the other.

    • sth125's avatar
      sth125
      Icon for New Contributor rankNew Contributor
      2 years ago

      I had thought connecting Vcc to DI_INT_CS4_ would make sure the logic got removed.

      What exactly does "Removed fan-out from the always-disabled " mean. What is being removed? Is it just removing the output connections of the two 74541 Octal Buffers and leaving the 74541s and other input logic in the generated logic?

      It would be nice to keep the design as it is now. If not I will change them, but I would like to know what is being generated for the existing design.

    • sth125's avatar
      sth125
      Icon for New Contributor rankNew Contributor
      2 years ago

      If DI_INT_CS4_ is always logic high, the output of the NAND gate will always be high no matter what the logic state of the other input is. Therefore, I wouldn't think the other input would matter.

      Also, the built-in help says the following about the warning:

      ID:13027 Removed fan-outs from the following always-disabled I/O buffers

      CAUSE: The design contains one or more tri-state buffers that have their output-enable input tied to GND. These tri-state buffers will never provide any useful data to the pins/nodes they feed.As a result, the Quartus Prime software has removed this fan-in. For example, the following Verilog design gives this warning for the tri-state node triwire:
      For my situation, I tied DI_INT_CS4_ to Vcc, which means the output enables are always logic high.
    • sth125's avatar
      sth125
      Icon for New Contributor rankNew Contributor
      2 years ago

      Also, I don't fully understand all the information in the warning:

      Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|12" to the node "DSP1_EMIF1_D[3]"

      inst18 is a GND and is not even related to inst45. Please see inst18.PNG below showing inst18 in the red circle.

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    So what is the issue and your goal at this point? You have disabled tri-state buffers that are not being used in the design.

    Also, it should be mentioned that there is no tri-state logic internal to the FPGA fabric, only in the I/O cells, so that may be part of the issue here as well. Note "I/O buffer" in the warning.

    If you are trying to determine what resources are being used and what has been removed, use the Technology Map Viewer (Post-fitting) to see a schematic of the used device resources post-fit.

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.