Forum Discussion
New ContributorWarning (13028): Removed fan-out from the always-disabled I/O buffer....
So what is the issue and your goal at this point? You have disabled tri-state buffers that are not being used in the design.
Also, it should be mentioned that there is no tri-state logic internal to the FPGA fabric, only in the I/O cells, so that may be part of the issue here as well. Note "I/O buffer" in the warning.
If you are trying to determine what resources are being used and what has been removed, use the Technology Map Viewer (Post-fitting) to see a schematic of the used device resources post-fit.
Super ContributorYou don't show what is controlling that other input into the NAND gate. If it can toggle, then the control logic for the buffers must remain, but that doesn't seem to be the case here.
Built-in help clarifies what is happening: https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#msgs/msgs/wmls_opt_removed_fanin_from_always_disabled_io_buf_to_tri_bus_hdr.htm
New ContributorAlso, I don't fully understand all the information in the warning:
Warning (13028): Removed fan-out from the always-disabled I/O buffer "Sheet505:inst18|74541:inst45|12" to the node "DSP1_EMIF1_D[3]"
inst18 is a GND and is not even related to inst45. Please see inst18.PNG below showing inst18 in the red circle.
