Honored ContributorHi everyone
I am working on a FPGA project using Stratix ii family. When compiling my project, the software automatically using DSP block to map some parts of the project. Now I do not want the these blocks, I only want using the registers and LUTs to cover the whole project. Is there any methods to ban the using of the DSP Blocks? maybe in settings? Thanks!
Honored ContributorWhat are the reasons for this? the DSP blocks give superior performance over logic generated multipliers.
In assignments -> settings -> Analysis and synthesis settings -> more settings -> auto DSP block replacement Set to off and see if this helps.Honored ContributorYou also might want to set "maximum DSP block usage" to 0.
Honored ContributorHonored ContributorHow are the multipliers generated, are they inferred or from the megawizard?
You didnt explain why you dont want to use the DSP blocks.Honored ContributorI think the multipliers are generated by the megawizard cause I used a lot of Arithmetic IP in megawizard such as ALTFP_DIV, ALTFP_EXP and so on.
As I mentioned in another thread(which is replied by you.Thanks again Tricky), I just want to compare two Algorithm's hardware consumption. Because one of them,when I do compilation, does not consume DSP block, while the other one does. Then I think is there any method to ban the DSP block when compilation,only to use the register and LUT.Honored ContributorThat doesnt really make much sense. The other design obviously uses components that are not suitable for a DSP block. This one does, which is a good thing. DSP blocks are there to be used. Comparing logic for logic is not really that helpful.
Just say that the first design uses 0 DSPs and this one uses N.Honored ContributorHonored ContributorThe only options I know of are:
1. Use a bigger device. 2. Modify your algorithm. Are you sure you havent accidently set the limits of the DSP blocks to fewer than the device has, having played with the settings.Honored Contributor
