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syam404's avatar
syam404
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4 years ago
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Error: No spd files are included in quartus project

1)While performing Generate Simulator Setup Script for IP it shows Error: No spd files are included in quartus project. So we are unable to generate .tcl file for simulation

2)I am using quartus prime 21.2 version in that there is no RTL Simulator.So how to do simulation now?

3)While creating block diagram design with IPs, how to create HDL wrapper of this and simulate

Thanks

  • RichardT_altera's avatar
    RichardT_altera
    4 years ago

    Hi @syam404

    May I know does my latest reply help?

    Do you have further questions in regards to this case?

    Best Regards,
    Richard Tan

    p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.

12 Replies

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    4 years ago

    Hi @syam404

    1. Have you try to Generate HDL for your platform designer system? You will need to generate the files through platform designer.

    2. You may use our simulator Modelsim Intel FPGA Edition (license required) or Modelsim Intel FPGA Starter Edition (no license required). https://fpgasoftware.intel.com/21.2/?edition=pro

    3. Are you using the Intel IP? I would recommend to use HDL instead of block diagram to write your design as the design getting larger and complicated.

    You may refer to the User Guide(UG) below to check the simulation flow.

    https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20093.pdf

    You may test out the design example in the UG to learn how the simulation works.

    Best Regards,
    Richard Tan

    p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.

  • syam404's avatar
    syam404
    Icon for New Contributor rankNew Contributor
    4 years ago

    Good Morning Sir,

    I am using Modelsim Intel FPGA Starter Edition only. In quartus prime 21.2 there is no RTL simulator like any other versions, so I have only one option to simulate that is by generating ip setup simulation script while doing this after compilation I am getting error like

    How could I remove this error please help me @RichardTanSY_Altera

    I have already referred the below UG still my problem not solved. And many other UGs and Intel FPGA videos I saw.

    https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20093.pdf

    Regards,

    Syam Sundar( syamsundarmalla99@gmail.com)

    • RichardT_altera's avatar
      RichardT_altera
      Icon for Super Contributor rankSuper Contributor
      4 years ago

      I’m glad that your question has been addressed. With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

      Best Regards,
      Richard Tan

      p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.

      • dsun01's avatar
        dsun01
        Icon for Contributor rankContributor
        4 years ago

        Hi Richard

        I saw you gave a link

        https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20093.pdf

        it is very helpful document to learn the Modelsim. but it didn't mention how to simulation Nios II.

        I have read AN351 document sentence by sentence, and try to follow it step by step, I got lost time and time because I am using Quartus Pro 21.3. AN351 is based On Quartus revision 11. as a newbie, it is really hard to understand AN351 and follow it step by step.

        is there a good document like "ug-20093.pdf" that used to teach simulate Nios II?

        I really need a clear and easy tutorial to learn how to run "hello world" on Modelsim.

        Thank you very much.

        David.