Forum Discussion
Occasional Contributormemory infer
in my project that base agilex7 fpga, I need to use bit mask memory. the bit mask memory rtl behavior as follow. as quartus only support byte mask memory, so I think quartus tool should use logic(ALM registers) implementation instead of M20K. However, the fitter technology map shows that the following rtl behaviors is mapping to the M20k, that cause rtl behavior is inconsistent with fitter netlist. is this quartus eda bug?
always @(posedge clk) begin
if (ram_wra) data[ram_addra] <= (data[ram_addra] ＆ ~ram_bwma) | (wrp_dina ＆ ram_bwma);
end
always @(posedge clk) begin
if (ram_rdb) wrp_doutb <= data[addrb];
end
5 Replies
FvMSuper Contributor
Hi,
the code is describing read-modify-write action that can be basically implemented with M20K block ram. Due to synchronous operation ram_addra is evaluated in different cycles for read and write, shown simple behavioral code is possibly not working as expected.
Question is if you require write to different address every clock cycle, in this case pipelined implementation with Agilex quad port mode can achieve the required functionality. But I doubt that it can be simply inferred.
Regards Frank
zjjso I am worry that logic function of the fitter netlist is inconsistent with rtl code behavior. how to verify it ? is there tool to verify the logic equivalence between netlist and rtl code?
- RichardT_altera
If you are concerned about functional equivalence, the recommended ways to verify are:
- Post‑fit simulation
- Formal equivalence checking
https://docs.altera.com/r/docs/683881/18.0/quartus-prime-pro-edition-user-guide-third-party-logic-equivalence-checking-tools/onespin-360-ec-fpga-software-support
If a pure logic (ALM‑only) implementation is required, you can force it using a RAM style attribute (for example, ramstyle = "logic"). Otherwise, the Quartus is allowed to implement using an M20K, as what FvM mentioned.
Regards,
Richard Tan
- RichardT_altera
Hi zjj ,
Do you have further inquiries regarding this thread?
Regards,
Richard Tan - RichardT_altera
Hi zjj
As I yet to reeive any response, we will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, I will step back and allow the community to assist with any future follow-up questions.
Thank you for engaging with us!
Best Regards,
Richard Tan
