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drbarryh's avatar
drbarryh
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2 months ago

Ashling RISC Free IDE fails to download ELF file

Hello ALTERA NIOSV Experts,

I have been trying to execute an application using a NIOSV CPU with the Ashling RISC Free IDE. The problem is that when trying to download the elf file to a MAX10 ALTERA Development board i see an error message saying that the AShling IDE cannot determine the JTAG clock speed.

I have added a Screen shot showing this event. Can anyone please suggest a solution to try ? I am currently using an ALTERA USB Blaster to connect but i have just ordered a USB Blaster II as i believe that can connect at faster clock speeds and is also more reliable.

Thanks for any help,

 

Embedded Applications Layer
general
Nios Cpu

9 Replies

  • Cloudscraper's avatar
    Cloudscraper
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    1 month ago

    This might be anectodal, but my experience with USB Blaster 1 has been that it was absolutely unable to make Ashling work correctly with it from the Ashling Riscfree VS Code extension. We had to resort to using an USB Blaster 2 and then everything got fixed.

    I cannot confirm if the same applies to the full version of Ashling, but if you could try at least one test with the Blaster 2 version it would be extremely profitable.

  • Rejeesh_Ashling's avatar
    Rejeesh_Ashling
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    1 month ago

    Hi Dr Barry H,

    Given that 'Auto-detect Scan Chain' is working well, JTAG access is not broken. A second look at the error message suggests Ashling RiscFree is unable to communicate with the Nios V core, which can happen if the core is the being held in reset state (or otherwise not running/responding).

    To further analyse the issue, could you please collect and share the following:

    1. Share low level probe logging file generated by Ashling RiscFree:

    In the 'Debugger' tab of the launch configuration, add the following to 'Additional command-line arguments' field. 

    --probe-log-level 7 --probe-log-path <path\to\store\log\file>

    Then re-launch the debug session. A log file (*.bin) should be generated at the specified location; please share that file.

    2. Share 'jtagconfig' output:

    From the Nios V shell, please run:   

     jtagconfig -d

    …and share the full output.

    Regards,

    Rejeesh

    • drbarryh's avatar
      drbarryh
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      1 month ago

      Hello Rajeesh, Some good news on the TSE because i got the tow ALTERA designs to run and connect to a Raspberry PI5 last night. The iperf3 test connected and ran now with no problems, as i caould also see in Wireshark with it completing the 3 way handshake and then continuing on with some tests, although it did keep reporting 0 bytes transferred and so the results was not what i expected. But at least it connected over the MAX10 board + TSE + MARVELL PHY. The Simple Server application also ran and i was able to control the MAX10 boards LEDS, so a good outcome.

      Now onto what we actually need. We are trying to fit our design into a MAX10 10M16 part if possible. We actually only need to be able to send UDP packets and we can do without an OS. Basically what we need is to be able to send packets of data in Ethernet Frames with a UDP payload. A minimal approach is what we need:

      1. Be able to initialize the MARVEL PHY over MDIO
      2. Be able to write data to a FIFO, encapsulate the data in an Ethernet Frame + UDP payload and send it to a PC using the TSE
      3. Be able to detect when a frame has been received by the TSE and offload it to our own FIFO + processing logic
      4. We don't really need DHCP because we intend to hard code IP addresses and MAD Destination addresses
      5. Be able to fit into a fairly small MAX10 FPGA (such as a 10M16)

      Can you please assist us to hack / remodel your design to make it fit this specification please ?

      Thanks, Dr Barry H

       

    • drbarryh's avatar
      drbarryh
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      1 month ago

      Hi Rajessh,

      I have a couple of questions to ask you about the MAX10 designs. 

      Q1: Am i intended to use the tcl script bsp_script_original.tcl which is located here:  \25.1std_max10_package\software  to build an Ashling IDE project from scratch ?

      If yes would i run it from the Software Directory in a NIOSV console ?

      Q2: During sending this command : $ niosv-download -g -r software/app_iperf/build/app_iperf.elf -c 1

      I see the following suspicious looking messages:

      INFO: Starting gdb. Running "riscv32-unknown-elf-gdb -batch -ex set non-stop on -ex set arch riscv:rv32 -ex set remotetimeout 60 -ex target extended-remote localhost:64265 -ex monitor swreset 1 1 -ex load software/app_iperf/build/app_iperf.elf -ex set $mstatus &= ~(0x00000088) -ex continue&".

      The target architecture is set to "riscv:rv32".

      warning: No executable has been specified and target does not support

      determining executable automatically. Try using the "file" command.

      warning: No executable has been specified and target does not support

      determining executable automatically. Try using the "file" command.

      Program received signal SIGINT, Interrupt.

      0x00000004 in ?? ()

      Invalid reset option

      Are these messages (in bold) meant to be there and the NIOSV CPU can recover from the SIGINT and this invalid reset option and the warning about the missing executable file ? I am not that familiar with this flow so can you explain what is going on please ?

      Thanks, Dr Barry H

      • LiangYuG_Altera's avatar
        LiangYuG_Altera
        Icon for Occasional Contributor rankOccasional Contributor
        1 month ago

        Hi Dr Barry H,

        Q1: Am i intended to use the tcl script bsp_script_original.tcl which is located here:  \25.1std_max10_package\software  to build an Ashling IDE project from scratch ?
        If yes would i run it from the Software Directory in a NIOSV console ?

        It is not mandatory, you can straight away use the provided bsp folder.

        The bsp_script_original.tcl is needed only when you wished to generate a 2nd bsp folder.
        (It will be exactly the same as the provided bsp folder, so this action is not mandatory.)

         

        Q2: During sending this command : $ niosv-download -g -r software/app_iperf/build/app_iperf.elf -c 1
        Are these messages (in bold) meant to be there and the NIOSV CPU can recover from the SIGINT and this invalid reset option and the warning about the missing executable file ? I am not that familiar with this flow so can you explain what is going on please ?

        Starting from beginning,

        warning: No executable has been specified and target does not support determining executable automatically. Try using the "file" command.

        In a normal gdb debugging session, it is common to use "file" followed by "load" command. This is necessary for debugging session. On the other hand, the niosv-download is simplified to execute run session (load & run the ELF, debug is not included). Thus, the gdb "file" command is optimized away.

        Program received signal SIGINT, Interrupt.
        0x00000004 in ?? ()
        Invalid reset option

        The Nios V processor can recover from the SIGINT & Invalid reset option.
        The invalid reset option is benign, and you may ignore it. 

        Regards,
        Liang Yu

    • drbarryh's avatar
      drbarryh
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      1 month ago

      Hi Rajeesh, I was trying to follow your instructions for generating a level 7 log file but i got an error message and the gdb failed to run. Here is the exact command line i put in the In the 'Debugger' tab of the launch configuration, in the 'Additional command-line arguments' field. The Directory D:/Intel_Alter_TSE_Solution/25.1std_max10_package/25.1std_max10_package/software/log_dir does exist, i created it myself ::

      --probe-log-level 7 --probe-log-path "D:/Intel_Alter_TSE_Solution/25.1std_max10_package/25.1std_max10_package/software/log_dir"

      Error in GDB server launch sequence

      Ashling GDB Server for RISC-V (ash-riscv-gdb-server).

      v25.2.1, 09-May-2025, (c)Ashling Microsystems Ltd 2024.

      Setting probe log level to 0x7.

      Error: Error: Cannot open probe log file in specified/default directory: d:\intel_alter_tse_solution\25.1std_max10_package\25.1std_max10_package\software

      Ashling GDB Server for RISC-V (ash-riscv-gdb-server).

      v25.2.1, 09-May-2025, (c)Ashling Microsystems Ltd 2024.

      Setting probe log level to 0x7.

      Error: Error: Cannot open probe log file in specified/default directory: d:\intel_alter_tse_solution\25.1std_max10_package\25.1std_max10_package\software

      I have attached a screenshot which shows the debugger  setup page

      Can you please take a look and see what the problem is here ?

      Thanks, Dr Barry H

  • Rejeesh_Ashling's avatar
    Rejeesh_Ashling
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    2 months ago

    Hi,

    It seems 'Auto adjust' of JTAG frequency is not working in this case. Could you try changing the 'JTAG Frequency' field in the launch configuration to any other value like 16Mhz and check the behaviour?

    Regards,

    Rejeesh

     

    • drbarryh's avatar
      drbarryh
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      2 months ago

      Hi Rajesh,

      Thanks for the reply to my CASE. Actually i have tried many different speed settings , 1,4,16,24 MHz and they all failed with the same error message. It seems like the Ashling RISC IDE is blocked somehow from accessing the JTAG channel. I have no idea why that might be. Have you used this Ashling RISC IDE before and got it to work ?
      I am running my design on a windows 10 PC.

      Thanks, Dr Barry H