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drbarryh's avatar
drbarryh
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2 months ago

Ashling RISC Free IDE fails to download ELF file

Hello ALTERA NIOSV Experts, I have been trying to execute an application using a NIOSV CPU with the Ashling RISC Free IDE. The problem is that when trying to download the elf file to a MAX10 ALTERA ...
Embedded Applications Layer
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Nios Cpu
Rejeesh_Ashling's avatar
Rejeesh_Ashling
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1 month ago

Hi Dr Barry H,

Given that 'Auto-detect Scan Chain' is working well, JTAG access is not broken. A second look at the error message suggests Ashling RiscFree is unable to communicate with the Nios V core, which can happen if the core is the being held in reset state (or otherwise not running/responding).

To further analyse the issue, could you please collect and share the following:

1. Share low level probe logging file generated by Ashling RiscFree:

In the 'Debugger' tab of the launch configuration, add the following to 'Additional command-line arguments' field. 

--probe-log-level 7 --probe-log-path <path\to\store\log\file>

Then re-launch the debug session. A log file (*.bin) should be generated at the specified location; please share that file.

2. Share 'jtagconfig' output:

From the Nios V shell, please run:   

 jtagconfig -d

…and share the full output.

Regards,

Rejeesh

drbarryh's avatar
drbarryh
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1 month ago

Hello Rajeesh, Some good news on the TSE because i got the tow ALTERA designs to run and connect to a Raspberry PI5 last night. The iperf3 test connected and ran now with no problems, as i caould also see in Wireshark with it completing the 3 way handshake and then continuing on with some tests, although it did keep reporting 0 bytes transferred and so the results was not what i expected. But at least it connected over the MAX10 board + TSE + MARVELL PHY. The Simple Server application also ran and i was able to control the MAX10 boards LEDS, so a good outcome.

Now onto what we actually need. We are trying to fit our design into a MAX10 10M16 part if possible. We actually only need to be able to send UDP packets and we can do without an OS. Basically what we need is to be able to send packets of data in Ethernet Frames with a UDP payload. A minimal approach is what we need:

  1. Be able to initialize the MARVEL PHY over MDIO
  2. Be able to write data to a FIFO, encapsulate the data in an Ethernet Frame + UDP payload and send it to a PC using the TSE
  3. Be able to detect when a frame has been received by the TSE and offload it to our own FIFO + processing logic
  4. We don't really need DHCP because we intend to hard code IP addresses and MAD Destination addresses
  5. Be able to fit into a fairly small MAX10 FPGA (such as a 10M16)

Can you please assist us to hack / remodel your design to make it fit this specification please ?

Thanks, Dr Barry H