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xiaohao's avatar
xiaohao
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2 months ago
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agilex 7 Platform Designer PIO 2x8

I used the Platform Designer PIO 2x8 example to build my own setup, but when I run lspci on the computer, I can only see one device pcie1, and cannot see pcie0. My hardware connections should be fine - I have two clock signals, and it works with the pcie pio x16 example. Where might I have configured something incorrectly?

The settings for pcie1 are basically the same as pci0. I'll post the parts that are different.

What have I missed or what have I configured incorrectly?

Pcie
  • VenT_Altera's avatar
    VenT_Altera
    1 month ago

    Hi xiaohao 

    Thank you for your updates. 

    Please generate the PIO Gen4 x8x8 design example directly from the P-Tile AVST IP Parameter in Quartus. These configurations are supported for your use case:

    • Gen4 x8x8 512-bit (250 MHz or below) Endpoint
    • Gen4 x8x8 256-bit Endpoint

     

    This design example only supports the default settings in the Parameter Editor of the P-tile Avalon Streaming IP for PCI Express. Therefore, leave all parameters at their defaults and modify only:

    • Hard IP Mode
    • PLD Clock Frequency

     

    After that, click “Generate Example Design.”

    Refer to P-Tile AVST Design Example User Guide: https://docs.altera.com/r/docs/683038/24.1/p-tile-avalon-streaming-ip-for-pci-express-design-example-userguide/directory-structure 

    Please let me know if you have any concerns.

    Thanks. 
    Best Regards,
    Ven 

8 Replies

  • xiaohao's avatar
    xiaohao
    Icon for New Contributor rankNew Contributor
    2 months ago

    When changing from PCIe x16 to a dual x8 configuration, do I need to reassign the FPGA pins?

    • VenT_Altera's avatar
      VenT_Altera
      Icon for Frequent Contributor rankFrequent Contributor
      2 months ago

      Hi xiaohao 

      Thanks for reaching out.
      When the PCIe IP is configured as 2x8 endpoints, the host treats it as two independent PCIe devices, so you should expect both to enumerate. When changing from PCIe x16 to a dual x8 configuration, you don't have to reassign the FPGA pins.
       

      May I ask:

      1. Are you using a custom board or Altera Dev Kit?
      2. Quartus version
      3. Does your host support PCIe bifurcation? Please check the BIOS settings.
      4. What is the Configuration Types used? Refer to Table 154: Supported Dual-Endpoint System Configurations, user guide: https://docs.altera.com/r/docs/683059/25.1.1/p-tile-avalon-streaming-fpga-ip-for-pci-express-user-guide/p-tile-dual-endpoint-system-configurations
      5. If you could attach the PCIe .ip file for me to generate the example design based on the parameter you set.


      You may try to create a clean project rather than migrating from a PCIe 1×16 design to 2×8. Generate a new example design directly from the IP with PCIe Gen4 2×8 selected and leave other parameters at their defaults.

      Thanks.
      Best Regards,
      Ven 

      • xiaohao's avatar
        xiaohao
        Icon for New Contributor rankNew Contributor
        1 month ago

        Thank you very much for your reply. I realize I should check the relevant settings in the BIOS. The documentation you provided seems rather complex and offers limited practical guidance for my specific use case, as I have little prior experience in this area.

        Regarding another issue: I am working with a custom-designed FPGA board using the AGFB027R25A2E2V chip. I have successfully implemented and run the PIO example project for intel_pcie_ptile_ast_0 Gen4 x16. However, when attempting to configure a 2x8 PIO setup, I encounter an issue where only one link is recognized by the system. Within the Quartus tool, I have been unable to locate a dedicated example project for a PIO 2x8 configuration. My initial attempt resulted in failure (the tool generated an x16 configuration instead). Would it be possible for you to share a reference example project for the 2x8 PIO implementation?

    • VenT_Altera's avatar
      VenT_Altera
      Icon for Frequent Contributor rankFrequent Contributor
      1 month ago

      Hi xiaohao 

      I would like to follow up regarding your question. 
      Please let me know if you have any updates or if you need further assistance. 

      Thanks. 
      Best Regards,
      Ven