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Altera_Forum
Honored Contributor
Honored Contributornios2-flash-programmer : elf & sof
Hi all
I have a zImage that uses SDRAM. this Image contains an application to configure the ethernet (a default IP address 192.168.10.180) and starts a TCP server when I use nios2 shell: nios2-download-g zImage & nios2-terminal it works well and the application set to launch at startup is working properly (ping 192.168.10.180 => ok) Now i need to enable the system to start from power on so I - from quartus i use " convert programming files " to program .jic file in EPCS16 ==> OK II - zImage into cfi flash ( base = 0x02800000 End = 0x02FFFFFF) 1- in SOPC, jtag_uart: NO_interactive_windows and nios_cpu reset vector 0x02800000 2- elf2flash - base = 0x02800000 - end = 0x02FFFFFF - reset = 0x02800000 - input = zImage - output = uc_flash.flash - boot = / cygdrive/e/01_Application/Altera/nios2eds/components/altera_nios2/boot_loader_cfi . srec ==> OK 3-nios2-flash-programmer --base=0x02800000 uc_flash.flash ==> download ok , checksum ok, leaving target processor paused When I reboot and I ping 192.168.10.180 nothing happens. I don't know if I missed a step!!! thanks for help11 Replies
Altera_ForumI have to use an RS232 to debug ? There is no ethernet interface to do it?
- Altera_Forum--- Quote Start --- bash-3.1$ nios2-flash-programmer --base=0x02800000 --debug -g Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK Found CFI table in 16 bit mode Raw CFI query table read from device: 0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 20: 51 00 52 00 59 00 02 00 00 00 40 00 00 00 00 00 Q.R.Y.....@..... 30: 00 00 00 00 00 00 27 00 36 00 00 00 00 00 07 00 ......'.6....... 40: 07 00 0A 00 00 00 03 00 05 00 04 00 00 00 17 00 ................ CFI query table read from device: 10: 51 52 59 02 00 40 00 00 00 00 00 27 36 00 00 07 QRY..@.....'6... 20: 07 0A 00 03 05 04 00 17 02 00 05 00 01 7F 00 00 ................ 30: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ CFI extended table read from device: 0: 50 52 49 31 33 10 02 01 00 08 00 00 02 B5 C5 05 PRI13........... 10: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ Read autoselect code 0001-227E (in 16 bit mode) No CFI override data for [FLASH-0001-227E] Device size is 8MByte Erase regions are: offset 0: 128 x 64K Device supports AMD style programming algorithm Multi-byte programming with 32 byte buffer Sector erase timeout is 16s Word program timeout is 1ms Buffer program timeout is 4ms Starting processor at reset vector (0x02800000) --- Quote End --- it work now :) i can ping 192.180.10.180 but the application don't run (it must be something else) Thank you :)
- Altera_Forum
You could also use system-console (http://www.altera.com/literature/hb/qts/qts_qii53028.pdf?gsa_pos=6&wt.oss_r=1&wt.oss=system%20console) to reset/halt the processor and then read the PC (confirm your reset vector), or single step the CPU to see where it's going on reset.
- Altera_Forum--- Quote Start --- Verifying 001A0000 (98%)assertion "(size & 3) == 0" failed: file "nios2flash.cpp", line 266 --- Quote End --- --- Quote Start --- No is failed :/ --- Quote End --- That verify failure at the end is a known bug. It got to 98% so it's likely OK. If you powerup then try nios2-flash-programmer --base=0x02800000 --debug -g what happens?
- Altera_Forum--- Quote Start --- nios2-flash-programmer --base=0x02800000 uc_flash.flash --verify --- Quote End --- No is failed :/ --- Quote Start --- bash-3.1$ nios2-flash-programmer --base=0x02800000 uc_flash.flash --verify Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK Verifying 001A0000 (98%)assertion "(size & 3) == 0" failed: file "nios2flash.cpp", line 266 1 [sig] nios2-flash-programmer 6184 e:\01_Application\Altera\nios2eds\bin nios2-flash-programmer.exe: *** fatal error - called with threadlist_ix -1 Hangup --- Quote End ---
- Altera_Forum
Is
nios2-flash-programmer --base=0x02800000 uc_flash.flash --verify successful? You could also add the -g option to test the reset vector. - Altera_Forum
thanks for replay,
--- Quote Start --- hen the question is where is your "Reset" vector really pointed too. If it's pointed to CFI_flash --- Quote End --- the reset vector is set at 0x02800000 and the cfi_flash base adresse is 0x02800000 --- Quote Start --- that would confirm your .sof flashing into EPCS is good and MSEL pins are OK. --- Quote End --- Yes flashing .sof into EPCS is good I use convert programming files to generate a .jic then i program the FPGA after i reboot the board and i use nios2-download & nios2-terminal to program zImage it works - Altera_Forum
Are the FPGA's MSEL pins set to configure from the EPCS and not from the CFI?
If you powerup then manually load the .sof into the FPGA using quartus programmer, does it work? That would confirm your .elf flashing into CFI is good. On the other hand, if you can powerup then use elf_download to load and run your software, that would confirm your .sof flashing into EPCS is good and MSEL pins are OK. - Altera_Forum
Then the question is where is your "Reset" vector really pointed too. If it's pointed to CFI_flash, it should work. But if it's pointed to the EPCS (Default setting) it's trying to load the program directly from the EPCS just after the FPGA bitfile.
Pete - Altera_Forum--- Quote Start --- but where is your hardware image (FPGA programming file/SOF) being storedimag --- Quote End --- I use EPCS16 i convert SOF file to jic and i use quartus programmer to program FPGA programming file i don't have enough space in the EPCS to store sof + elf :/ so i use cfi_flash for zImage
