MAX10 ADC doesn't start during power on

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Hey johnboy,

I tried to contact you because of the MAX10 files. But unfortunately your mail account is not longer available. Are still active in this forum?

Regards

Mathias

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YES, I have worked on the MAX10 ADC. It doesn't work well, an external ADC works better, much better. I used QSYS to get the basic files for the ADC Core only and hooked up my self. It works using SOF but not using POF. Just the ADC does not work with the POF, the rest of my code works fine.

Hey johnboy,

I tried to contact you because of the MAX10 files. But unfortunately your mail account is not longer available. Are still active in this forum?

Regards

Mathias

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Hi johnboy,

Thanks for your reply. That's okay if you can help me with this next week but please kindly do post next week. In the mean time I will try to figure out how to make this work.

Thanks,

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OK, if you send me your email I will blast you a bunch of files I used to make the MAX10 ADC work.

[email protected]

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YES, I was able to get the MAX 10 core only ADC working. BUT the ADC is not great and finally I used an external ADC from Analog Devices, much better. The Max 10 ADC needs a bunch of Verilog stuff buried in the Altera's Qsys. Altera does not seem to help with this mode. I have a bunch of files, but will not be able to help you until next week.

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Hi johnboy,

Thanks for your reply. That's okay if you can help me with this next week but please kindly do post next week. In the mean time I will try to figure out how to make this work.

Thanks,

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Hi Kattice,

I saw that you have used the ADC control Core only as the core variant. I'm using the same core variant but I'm not able to get my ADC working properly. I've enabled the channel CH 0 of ADC1 and have connected the parameters as required but when I'm giving a signal from a signal generator response_data port is showing nothing. Could you please help me with this issue ? Is there any other configuration that needs to be done while using the ADC control core ?

Thanks,

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YES, I was able to get the MAX 10 core only ADC working. BUT the ADC is not great and finally I used an external ADC from Analog Devices, much better. The Max 10 ADC needs a bunch of Verilog stuff buried in the Altera's Qsys. Altera does not seem to help with this mode. I have a bunch of files, but will not be able to help you until next week.

Hi Kattice,

I saw that you have used the ADC control Core only as the core variant. I'm using the same core variant but I'm not able to get my ADC working properly. I've enabled the channel CH 0 of ADC1 and have connected the parameters as required but when I'm giving a signal from a signal generator response_data port is showing nothing. Could you please help me with this issue ? Is there any other configuration that needs to be done while using the ADC control core ?

Thanks,

Here is the line in the verilog FSM for the ADC module only:

night_adc:u0|night_adc_modular_adc_0:modular_adc_0|altera_modular_adc_control:control_internal|altera_modular_adc_control_fsm:u_control_fsm|ctrl_state.PWRDWN_DONE

This is hi when the .pof is programmed in the MAX10.

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interesting part of this problem. When you program the part using POF, the part restarts itself using the POF file

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Indeed. Interesting. I've just confirmed this for myself as well. So, as you say, no power up issue appears to be relevant.

How are you instantiating and connecting up your ADC module? Specifically, how are you controlling the 'reset' and the 'pll locked' signals? Could it be that, for your chosen part, not controlling these correctly could cause the issue?

I've tried modifying how both these are controlled but can't reproduce the ADC lockup on the only MAX 10 board I have - a max 10 fpga evaluation kit (https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-max-10-evaluation.html). The ADC always works, regardless of both what I do with these signals and how the FPGA is configured. However, could there be a problem in certain devices regarding the reset and/or locked signals to the ADC block?

Cheers,

Alex

Hi Alex,

Here is interesting part of this problem. When you program the part using POF, the part restarts itself using the POF file. Based on the other development boards, the part does restart after the POF configuration. This behavior excludes the possibility of power up sequence issue. This remains whether there is enough current for transient during the configuration from POF. From the power management user guide, it states that 680mA is maximum power transient current. Can transient current can cause ADC IP configuration to fail?

Thanks,

K