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Altera_Forum
Honored Contributor
9 years agoHere is the line in the verilog FSM for the ADC module only:
night_adc:u0|night_adc_modular_adc_0:modular_adc_0|altera_modular_adc_control:control_internal|altera_modular_adc_control_fsm:u_control_fsm|ctrl_state.PWRDWN_DONE This is hi when the .pof is programmed in the MAX10.