Max V output pin in a disconnected mode on logic 1

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Do I need any passive external components to make this work?

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No, you just need to describe it the way you want. For example, in VHDL the code for a tri-state buffer with an active-low output-enable is

output_pin <= 'Z' when (output_enableN = '1') else '0';

This describes a tri-state buffer with a zero on its input. When you enable the buffer it drives the output pin low, when you disable the buffer, the output pin is tristated.

You can do something similar with a buffer component in the schematic editor, or in Verilog HDL.

Cheers,

Dave

grips03,

electrically, the output does not achieve perfect floating (infinite impedance) but only a large impedance.

Thus, if nothing else is driving the line, you'll still see some kind of voltage on the line, which will depend on the output driver design and internal states.

I found tri buffer in schematic editor and looks like I can add not gate to the control pin such that

- if output is 0 then not gate will invert and cause 1 on buffer control pin, so that my input of 0 = output of 0

- if my output is 1, then not gate will invert and cause 0 on buffer control pin and this will cause high impedance

Output of tri buffer seems to be valid for output pin per the docs I found. Going to try in 30 minutes.

thanks for the help

Perhaps I did not do this right. I still see 3.3v on output pin even after adding the Tri buffer.

http://www.flickr.com/photos/20625046@n08/8745793185/in/photostream

Did I do something wrong?

As a side remark, there's no reason to connect the input of the tristate buffer to the signal, it should be connected to ground.

But this doesn't explain why you see a high level. You may want to check it's drive strength by connecting a pull-down resistor for test, e.g. 1 k.

A possible explanation is that you have enabled the weak pull-up feature for the pin, or there's an external pull-up somewhere in your circuit,

rbugalho - I re-read your comments and tried the Max V in circuit and all voltage levels look good with the Tri state buffer on the output.

FvM - thank you for the advice I will make that change to clean up the design.

thanks everyone for the great help