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Altera_Forum's avatar
Altera_Forum
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12 years ago

Max V output pin in a disconnected mode on logic 1

I'm using Max V dev kit for basic logic gate design. No clocking or anything. Logic part works fine. On logic 1 / high I would like the output pin to be floating / disconnected. Right now it pr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

As a side remark, there's no reason to connect the input of the tristate buffer to the signal, it should be connected to ground.

But this doesn't explain why you see a high level. You may want to check it's drive strength by connecting a pull-down resistor for test, e.g. 1 k.

A possible explanation is that you have enabled the weak pull-up feature for the pin, or there's an external pull-up somewhere in your circuit,