Max V output pin in a disconnected mode on logic 1

I found tri buffer in schematic editor and looks like I can add not gate to the control pin such that

- if output is 0 then not gate will invert and cause 1 on buffer control pin, so that my input of 0 = output of 0

- if my output is 1, then not gate will invert and cause 0 on buffer control pin and this will cause high impedance

Output of tri buffer seems to be valid for output pin per the docs I found. Going to try in 30 minutes.

thanks for the help