LPM_MULT not working for Cyclone 10 GX device

It might be a clocking problem. Your multiplier won't produce valid output (that's why you are getting zero) until a valid input is provided after the rising clock edge. If clock is not configured or not routing it won't work. In your code you have clock set to X which is not accurate. X is the default value for "simulations" only. Be sure your clock is wired and hits the LUT blocks. Also you may want to tap/monitor the clock signal with SignalTap for verification ! Good luck and have lots of fun debugging your code

Yes. I created an instantiation with the IP catalog:

General tabGeneral 2 tabPipelining tab

What does "tap the LPM_MULT standalone" mean? What version of Quartus Pro are you using? What is the FPGA you are using?

I'm not sure what the point is. The wrapper was created by the wizard. Is the following incorrect? (Note, this is for the workaround version using logic cells. The lpm_hint in the broken version was just "MAXIMIZE_SPEED=5").

---

// mul_11bit_14bit.v

// Generated using ACDS version 24.2 40

`timescale 1 ps / 1 ps
module mul_11bit_14bit (
input wire [10:0] dataa, // dataa.dataa, Input data A of this multiplier
output wire [24:0] result, // result.result, Result of the multiplier
input wire [13:0] datab, // datab.datab, Input data B of this multiplier
input wire clock // clock.clk, Clock input for pipelined usage.
);

mul_11bit_14bit_lpm_mult_1921_acrkt5q lpm_mult_0 (
.dataa (dataa), // input, width = 11, dataa.dataa
.result (result), // output, width = 25, result.result
.datab (datab), // input, width = 14, datab.datab
.clock (clock) // input, width = 1, clock.clk
);

endmodule

---

---

module mul_11bit_14bit_lpm_mult_1921_acrkt5q (
clock,
dataa,
datab,
result);

input clock;
input [10:0] dataa;
input [13:0] datab;
output [24:0] result;

wire [24:0] sub_wire0;
wire [24:0] result = sub_wire0[24:0];

lpm_mult lpm_mult_component (
.clock (clock),
.dataa (dataa),
.datab (datab),
.result (sub_wire0),
.aclr (),
.clken (1'b1),
.sclr (1'b0),
.sum (1'b0));
defparam
lpm_mult_component.lpm_hint = "DEDICATED_MULTIPLIER_CIRCUITRY=NO,MAXIMIZE_SPEED=5",
lpm_mult_component.lpm_pipeline = 1,
lpm_mult_component.lpm_representation = "UNSIGNED",
lpm_mult_component.lpm_type = "LPM_MULT",
lpm_mult_component.lpm_widtha = 11,
lpm_mult_component.lpm_widthb = 14,
lpm_mult_component.lpm_widthp = 25;

endmodule

---

dataa and datab are written to once and are static, so registering them shouldn't have an effect.

If lpm.hint is "DEDICATED_MULTIPLIER_CIRCUITRY=NO,MAXIMIZE_SPEED=5" multiplier operates nominally.

If lpm.hint is "MAXIMIZE_SPEED=5" multiplier always outputs 0 for my FPGA (10CX150YF780E6G).