Altera_Forum
Honored Contributor
13 years agoJTAG chain debugger tools scripts & JTAG clock management
Hi everyone,
For a design tests, I'm planning to implement this design to a Cyclone II FPGA (integrated to a DE1 board). I then would like to apply stimuli on DUT inputs via the JTAG chain and to read outputs too. I found the JTAG chain debugger tool in Quartus which would allow me to read and write data via JTAG on DUT I/Os. However, I would like to use this tool via scripts, in order to automate those tests and to integrate this system to a full testbench.- Does anyone have documentation about how to write JTAG chain debugger scripts? Is it possible? Which scripting language is available?
- Are the Cyclone II clock pins integrated to the JTAG chain?
- If the JTAG clock is slower than the DUT's clock (which is often the case I guess), how can we catch an output corresponding to an input previously applyed? And how can we deal with metastability?