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Altera_Forum
Honored Contributor
14 years agoJTAG chain debugger tools scripts & JTAG clock management
Hi everyone, For a design tests, I'm planning to implement this design to a Cyclone II FPGA (integrated to a DE1 board). I then would like to apply stimuli on DUT inputs via the JTAG chain an...
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- I then would like to apply stimuli on DUT inputs via the JTAG chain and to read outputs too. I found the JTAG chain debugger tool in Quartus which would allow me to read and write data via JTAG on DUT I/Os. --- Quote End --- A higher-level of abstraction already exists to perform this type of testing. I've created a tutorial that walks you through the basics: http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial Cheers, Dave