division 2 integer value and output to the output reg

Question

Hi,

Is it can not direct using the division '/' in verilog?.. I notice that the result of division between two integers number and stored in the out reg gives red color words shown in Signal Tap II.

initialisation-----

integer NumPixel, Sum_Xposition, Sum_Yposition;

output reg [10:0] CM1X, CM1Y;

function-----

CM1X = Sum_Xposition/NumPixel;

CM1Y = Sum_Yposition/NumPixel;

The CM1Y and CM1X shown in red while i try to simulate using Signal tap.

Pls help as my project is going to due.

Thanks you

altera_forum · Answer

The question, if your code compiles correctly is answered by the synthesis tool, not Signaltap. If the code compiles correctly, you can expect that it has been accepted. You should also find an information about inferred dividers in the compilation messages and the report.

If a signal is not recognized by Signaltap, you haven't selected the right object. You should be able to select the output of the divider entities in the Signaltap hierarchy browser. As a general hint, try to access a signal at it's source, not as a wire in a different design entity.

altera_forum · Answer

Hi,

I have found my mistake..

By the way, i trying to use the Altera megawizard to perform that division.

However, I notice the minimum bit allowed is 32 bit. If i only wan 11 bit for the divisor, dividend, and the result?..

altera_forum · Answer

--- Quote Start ---  I notice the minimum bit allowed is 32 bit.  --- Quote End ---    32 Bit for what? I'm not aware of this restriction.

altera_forum · Answer

Is it ALTFP_DIV?

I key in the floating pointing point format as Single precision (32 bits). However, the "how wide should the 'dataa' input and 'datab' input, and 'result' buses be" not allow me to key in 11 bits.

I try to use this 32 bits input and output module. When I run the signal tap that time, i saw the dividend and divisor is changing at the way i want. However, the result is fix at one value, not depending on the dividend and the divisor... Is there anything wrong with my module?..

altera_forum · Answer

You want to implement division in floating point format (ALTFP_DIV does that)? Then, naturally, your options are 32-bit (single precision) or 64 bit (double precision) only. For fixed point format use LPM_DIVIDE megafunction and choose how many bits of precision you want.

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division 2 integer value and output to the output reg

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