Cyclone V De0-Nano SOC - trigger capture - latency with Accessing gpio from HPS

Hello,

the dev board i have is the DE0-Nano-SOC

5csema4u236cn

I am looking for an easy and fast way to give the HPS access to the GPIO pins. Currently I have this flow setup:

1. click button on webpage

2. hps saves button state and sends a 1 to the FPGA DigitalOut_1

-(HPS) int A =1 -> H2F word -> (FPGA) DO_1 = 1 ( takes 1000ms)

3. external hardware sends a high signal 150ms after recieving 1

4. FPGA recieves the high signal on DigitalIn_1 line, sends a word back to HPS

- (FPGA) DI_1 = 1 -> F2H word -> (HPS) int B = 1 (takes 1000ms)

the problem is that sending signals across the F2h and H2F bus is way too slow. Is it possible for the HPS to directly access and control the DigitalOut/In pins?

My current issue is that the F2h and H2b bus is way too slow. Is there a way for the HPS to directly access the I/O pins?

the digital pins are connected to a pcb that sends a trigger back if it sees a high signal. the trigger only lasts for about 20ms and is usually missed in the F2H window.