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saadche's avatar
saadche
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2 years ago

Cyclone V De0-Nano SOC - trigger capture - latency with Accessing gpio from HPS

Hello, the dev board i have is the DE0-Nano-SOC 5csema4u236cn I am looking for an easy and fast way to give the HPS access to the GPIO pins. Currently I have this flow setup: 1. click button on ...
Configuration
Generic Io
Programmable Logic Device
sstrell's avatar
sstrell
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2 years ago

You don't have to use the bridges to access GPIO. Set up GPIO access in the parameter editor for the HPS.

saadche's avatar
saadche
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2 years ago

Hello sstrell.

I must have a misguided understanding of how this works. Could you possibly point me in the direction of a doc or video that would explain how I would go about that?

Under Quartus->Qsys, I only see the F2h and H2F interfaces. Would the configuration you're referring to be there?

Or do you mean that I need to map the FPGA I/O to a spot in memory for the HPS to access?

side note..... : FPGA is programmed in Quartus(Verilog) and HPS in eclipse (C++).