Forum Discussion
18 Replies
- JohnT_Altera
Regular Contributor
Hi,
May I know which flash are you referring to?
If you would like to understand what configuration is supported in Arria 10 then I would recommend you to check https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_handbook.pdf Chapter 7.
- APPU_appu
Occasional Contributor
Flash EPCQL1024,
please tell me how to assign start address foe .sof and .hex file.
- JohnT_Altera
Regular Contributor
Hi,
From the picture provided, you are using Active Serial programming. You may refer to https://www.intel.com/content/www/us/en/programmable/documentation/iga1446487888057.html#fwl1479912385825 Chapter 5.2.3.3.3 on how to set the memory addressing.
- APPU_appu
Occasional Contributor
Hi @JohnT_Intel
Thanks,
according to handbook i updated my project, still it is showing same error.is there any example project related to remote update generic flash serial for arria 10 part number 10AX115S2F45I1SG and EPCQL1024 flash.
- JohnT_Altera
Regular Contributor
Hi,
May I know what is the error observed? The reason is that the image is very blur.
- APPU_appu
Occasional Contributor
Hii @JohnT_Intel @n_scott_pearson
Thanks for replying
1.Here the issue is how to generate .hex file (if i generate .hex file with the nios tool, while generating .jic file Quartus tool is telling like address overlap with 0x0000_00F0).
2. What should be the address for Nios IP and generic serial IP for reset vector.3.what should be written in main.c (nios II SBT) to connect remote terminal
4. how to connect remote teminal our project
Thanks @JohnT_Intel
Below i attached my project arria 10 (part number : 10AX115S2F45I1SG and flash EPCQL1024)
- JohnT_Altera
Regular Contributor
Hi,
May I know which HEX file should I used? I try both the hex file in software\arria10\mem_init folder and it is telling me that there is overlap data inside the hex file.
- APPU_appu
Occasional Contributor
Hi @JohnT_Intel
Thanks,
yes with that both file i am geting same error like
i am also facing same issue, i am not able to solve. can u tell me how to generate proper .hex file with nios- APPU_appu
Occasional Contributor
Hi @JohnT_Intel
Thanks,
community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Arria-10-gx-remote-upgrade-generic-flash-access-using-flash/m-p/1260855#M19387
what ever projet you give that project is not having nois ip and generic flash and remote ip also.
If i tried upgrade 18.1 quartus it is showing error in the ip upgradation
- JohnT_Altera
Regular Contributor
Hi,
I do not observed any attachment.
1. May I know if you are using Quartus Programmer to program the jic file?
2. When you mention not booting, is it the FPGA not configured successfully or the Nios II not booting successfully?
- APPU_appu
Occasional Contributor
@JohnT_Intel @BoonBengT_Altera
just now updated one attachmenet plaese check that one and yes for remote upgrad we used .rpd file which generated form .jic (sof + hex file) . when i tried upgrade flash with .rpd file with the external tool like remote terminal/uart terminal fpga glowing with red led after powering on.
- APPU_appu
Occasional Contributor
- JohnT_Altera
Regular Contributor
Hi,
May I know which address do you start writing into the flash? If you are writing into address 0x0 of the flash then it will not work. You will need write to address 0x20 of the flash.
Do you generate with Little Endian or Big Endian? You can change the rpd endian through the Option setting.
- APPU_appu
Occasional Contributor
@JohnT_Intel
address : 0x20 of the flash and little endian used while generating .rpd file
- JohnT_Altera
Regular Contributor
Hi,
Can you try to generate big endian and see if the issue is resolved? If it is still not resolved, could you help to read the flash content?- APPU_appu
Occasional Contributor