JohnT_Altera
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Re: AI Suite - Why does the Sequential IP not take a model argument?
Hi, The Sequential IP can support multiple model as it is depend on how you implement the features into the IP. So the flow is to run "dla_compiler --network-file model.xml --march my_arch.arch" where it report what is the unsupported layer in the current Sequential IP. Thanks.30Views1like3CommentsRe: AI Suite - Various Questions
1. Estimating whether a model will fit on an FPGA using a formula What could be an approximating formula (It does not need to be accurate). And what are the typical limiting factors? You can run the dla_compiler to get the resources utilization base on https://docs.altera.com/r/docs/863373/2026.1.1/fpga-ai-suite-handbook/estimating-the-area-and-power-of-an-architecture 2. Impact of the enable_parameter_rom parameter Is it correctly understood that this parameter determines whatever the mif (Memory initialization files) containing the weights are put inside a rom or external memory? This function is depreciated. Use enable_on_chip_parameters and disable_external_memory instead. This will disable the use of external memory Does this actually impact the speed? I would assume that the external memory might be faster than some of the bottleneck components in the AI IP block. Yes, but will increase the M20K utilziation 3. Any architecture options for the Spatial IP? My model uses a 16bf * 6 input, so I think it would make sense to increase the input stream size so it matches. But I don't know if the same options from the sequential IP also applies to the spatial IP, since the example is just two lines. Please refer to $COREDLA_ROOT/example_architectures/AGX5_Simple_Spatial.arch $COREDLA_ROOT/example_architectures/AGX7_Robust_Spatial_Compilation.arch $COREDLA_ROOT/example_architectures/AGX7_Simple_Spatial.arch5Views1like0CommentsRe: AI Suite - Custom model in the FPGA building process
HI, You will be using the FPGA AI Suite compiler to optimize your NN model that you made into the FPGA. Please refer to https://docs.altera.com/r/docs/863373/2026.1.1/fpga-ai-suite-handbook/creating-an-architecture-files-for-the-fpga-ai-suite-spatial-ip.67Views1like0Comments