JohnT_AlteraRegular ContributorJoined 7 years ago1690 Posts58 LikesLikes received59 SolutionsView All Badges
ContributionsMost RecentMost LikesSolutionsRe: Agilex 7 R-Tile RBES FPGA – CXL Device Enumeration Failure with CXL IP Design Example Hi, I suspect that the board is already damaged. You will need to debug what is causing the issue for it to be enumerated on the failure board. Re: ALTPLL Megawizard keeps crashes Hi, Do you have any other queries? Re: NOR Flash IC programming using 3rd party Programmer Please help to check the content of the bitstream in the flash and compare if there is any different between the 2 method Re: Agilex 9 Port Synchonization within A Tile Hi, We will have SME look into this. Re: Agilex 7 R-Tile RBES FPGA – CXL Device Enumeration Failure with CXL IP Design Example Hi, Can you confirm if this board that is failing, is now failing on old and new CXL bitstream? Re: Bitstream encryption via TCL for CycloneV Hi, May I know if you have any other queries? Re: Triple-Modular Redundancy (TMR) Hi, May I know if you have any other queries? Re: Agilex 7 R-Tile RBES FPGA – CXL Device Enumeration Failure with CXL IP Design Example Hi, Do you still have the previous compiled design which is working to verify the setup is still working correctly? Re: ALTPLL Megawizard keeps crashes Hi, Is there a way to use higher RAM PC? Re: ALTPLL Megawizard keeps crashes Hi, Can you share with me your PC specification? Thanks.
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